Freescale Semiconductor MCF54455 Reference Manual page 50

Table 2-2. MCF5445x Signal Information and Muxing (continued)
Signal Name GPIO
FEC0_COL PFEC0H4
FEC0_CRS PFEC0H0
FEC0_RXCLK PFEC0H3
FEC0_RXDV PFEC0H2
FEC0_RXD[3:2] PFEC0L[3:2]
FEC0_RXD1 PFEC0L1
FEC0_RXD0 PFEC0H1
FEC0_RXER PFEC0L0
FEC0_TXCLK PFEC0H7
FEC0_TXD[3:2] PFEC0L[7:6]
FEC0_TXD1 PFEC0L5
FEC0_TXD0 PFEC0H5
FEC0_TXEN PFEC0H6
FEC0_TXER PFEC0L4
FEC1_MDC PFECI2C5
FEC1_MDIO PFECI2C4
FEC1_COL PFEC1H4
FEC1_CRS PFEC1H0
FEC1_RXCLK PFEC1H3
FEC1_RXDV PFEC1H2
FEC1_RXD[3:2] PFEC1L[3:2]
FEC1_RXD1 PFEC1L1
FEC1_RXD0 PFEC1H1
FEC1_RXER PFEC1L0
FEC1_TXCLK PFEC1H7
FEC1_TXD[3:2] PFEC1L[7:6]
Freescale Semiconductor
Alternate 1 Alternate 2
— ULPI_DATA7
— ULPI_DATA6
— ULPI_DATA1
FEC0_RMII_ —
CRS_DV
— ULPI_DATA[5:4]
FEC0_RMII_RXD1 —
FEC0_RMII_RXD0 —
FEC0_RMII_RXER —
FEC0_RMII_ —
REF_CLK
— ULPI_DATA[3:2]
FEC0_RMII_TXD1 —
FEC0_RMII_TXD0 —
FEC0_RMII_TXEN —
— ULPI_DATA0
FEC1
— ATA_DIOR
— ATA_DIOW
— ATA_DATA7
— ATA_DATA6
— ATA_DATA5
FEC1_RMII_ ATA_DATA15
CRS_DV
— ATA_DATA[4:3]
FEC1_RMII_RXD1 ATA_DATA14
FEC1_RMII_RXD0 ATA_DATA13
FEC1_RMII_RXER ATA_DATA12
FEC1_RMII_ ATA_DATA11
REF_CLK
— ATA_DATA[2:1]
Signal Descriptions
MCF54450
MCF54451
256 MAPBGA
— I EVDD E1
—
I EVDD F1
—
I EVDD G1
—
I EVDD G2
—
I EVDD G3, G4
—
I EVDD H1
— I EVDD H2
— I EVDD H3
— I EVDD H4
— O EVDD J1, J2
— O EVDD J3
— O EVDD J4
— O EVDD K1
— O EVDD K2
— O EVDD —
— I/O EVDD —
— I EVDD —
— I EVDD —
— I EVDD —
— I EVDD —
— I EVDD —
— I EVDD —
— I EVDD —
— I EVDD —
— I EVDD —
— O EVDD —
MCF54452
MCF54453
MCF54454
MCF54455
360 TEPBGA
AB7
AA7
AA8
Y8
AB9, Y9
W9
AB10
AA10
Y10
W10, AB11
AA11
Y11
W11
AB12
W20
Y22
AB18
AA18
W14
AB15
AA15, Y15
AA17
Y17
W17
AB19
Y19, W18
2-5