Freescale Semiconductor MCF54455 Reference Manual page 493

SDRAM Controller (SDRAMC)
SDCR[ADDR_MUX]
Table 21-3. SDRAM-Address Multiplexing in 16-bit Bus Mode
Device Configuration
4M x 16 bit
8M x 8 bit
64 Mbits
16M x 4 bit
8M x 16 bit
16M x 8 bit
128 Mbits
32M x 4 bit
16M x 16 bit
32M x 8 bit
256 Mbits
64M x 4 bit
21-6
Table 21-2. Address Multiplexing for 16-bit Bus Mode
Internal Address Bits [27:24]
IA[27]
00 CA13
01 CA12
10 CA11
11
Row bit x SDCR
Col bit x [ADDR_
Banks MUX] 27
1,2
11 x 9 x 4 00 —
12 x 9 x 4 00 —
12 x 10 x 4 00 —
13 x 9 x 4 01 —
12 x 9 x 4 00 —
12 x 10 x 4 00 —
13 x 9 x 4 01 —
12 x 11 x 4 00 —
13 x 10 x 4 01 —
14 x 9 x 4 10 —
12 x 10 x 4 00 —
13 x 9 x 4 01 —
12 x 11 x 4 00 —
13 x 10 x 4 01 —
14 x 9 x 4 10 —
12 x 12 x 4 00 —
13 x 11 x 4 01 —
14 x 10 x 4 10 —
IA[26] IA[25]
CA12 CA11
CA11 CA9
CA9 RA13
Reserved. Do Not Use.
Internal Address
26 25 24
— — —
— — —
— — CA9
— — RA12
— — —
— — CA9
— — RA12
— CA11 CA9
— CA9 RA12
— RA13 RA12
— — CA9
— — RA12
— CA11 CA9
— CA9 RA12
— RA13 RA12
CA12 CA11 CA9
CA11 CA9 RA12
CA9 RA13 RA12
IA[24]
CA9
RA12
RA12
23 – 12 11 – 10 9 – 1
RA11-0 BA1-0 CA8-0
RA11-0 BA1-0 CA8-0
RA11-0 BA1-0 CA8-0
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