Freescale Semiconductor MCF54455 Reference Manual page 343

Crossbar Switch (XBS)
Address: 0xFC00_4110 (XBS_PRS1)
0xFC00_4210 (XBS_PRS2)
0xFC00_4310 (XBS_PRS3)
0xFC00_4410 (XBS_PRS4)
0xFC00_4510 (XBS_PRS5)
0xFC00_4710 (XBS_PRS7)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1
RO
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1
After this bit is set, only a hardware reset clears it.
Field
31 Read only. Forces both of the slave port's registers (XBS_CRSn and XBS_PRSn) to be read-only. After set, only a
RO hardware reset clears it.
0 Both of the slave port's registers are writeable.
1 Both of the slave port's registers are read-only and cannot be written (attempted writes have no effect on the
registers and result in a bus error response).
30–9 Reserved, must be cleared.
8 Arbitration Mode. Selects the arbitration policy for the slave port.
ARB 0 Fixed priority
1 Round robin (rotating) priority
7–6 Reserved, must be cleared.
5–4 Parking control. Determines the slave port's parking control. The low-power park feature results in an overall power
PCTL savings if the slave port is not saturated; however, this forces an extra latency clock when any master tries to access
the slave port while not in use because it is not parked on any master.
00 When no master makes a request, the arbiter parks the slave port on the master port defined by the PARK bit
field.
01 When no master makes a request, the arbiter parks the slave port on the last master to be in control of the slave
port.
10 When no master makes a request, the slave port is not parked on a master and the arbiter drives all outputs to
a constant safe state.
11 Reserved.
3 Reserved, must be cleared.
2–0 Park. Determines which master port the current slave port parks on when no masters are actively making requests
PARK and the PCTL bits are cleared.
000 Park on master port M0 (ColdFire Core)
001 Park on master port M1 (eDMA Controller)
010 Park on master port M2 (FEC0)
011 Park on master port M3 (FEC1)
100 Reserved
101 Park on master port M5 (PCI Controller)
110 Park on master port M6 (USB OTG)
111 Park on master port M7 (Serial Boot)
15-6
Figure 15-3. XBS Control Registers Slave n (XBS_CRSn)
Table 15-4. XBS_CRSn Field Descriptions
Description
Access: Supervisor read/write
8 7 6 5 4 3 2 1
0 0 0
ARB PCTL PARK
0 0 0 0 0 0 0 0 0
Freescale Semiconductor
0