Freescale Semiconductor MCF54455 Reference Manual page 293

Chip Configuration Module (CCM)
The CCR bit definition for 256-pin devices is shown in the below figure and table.
Address: 0xFC0A_0004 (CCR)
15 14 13
R
0 0 0
W
Reset 0 0 0
Note: Reset value depends upon chosen reset configuration. Default reset value (BOOTMOD = 00) is the value of
RCON.
Field
15–10 Reserved, must be cleared.
9–8 Reserved, must be set.
7–5 Flexbus, port size configuration. Relects the chosen Flexbus address/data muxing mode and port size.
FBCONFIG
Muxed means that the FB_AD[31:0] signals are used for Flexbus address and data.
Non-muxed means that the FB_AD[31:0] signals are used for Flexbus data and the PCI_AD[23:0] signals are
used for Flexbus address.
Note: The FBCONFIG field value may not be valid following serial boot, because serial boot reset configuration
can select chip configurations not shown in the above table.
4 PLL mode. Reflects the chosen overall clocking mode for the device.
PLLMODE 0 Normal operation; PLL drives internal clocks
1 Limp mode; low-power clock divider drives internal clocks
11-6
12 11 10 9
0 0 0 1
0 0 0 1
Figure 11-3. Chip Configuration Register (CCR) 256-pin
Table 11-5. CCR Field Descriptions 256-pin
FBCONFIG
000
001
010
011
100
101
110
111
8 7 6 5
1 FBCONFIG
1
Description
Flexbus A/D Port Size
Non-muxed 32-bit
Non-muxed 8-bit
Non-muxed 16-bit
Reserved
Muxed 32-bit
Muxed 8-bit
Muxed 16-bit
Reserved
Access: Supervisor read-only
4 3 2 1
PLL OSC
PLLMULT
MODE MODE
See Note
Freescale Semiconductor
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