Freescale Semiconductor MCF54455 Reference Manual page 877

Debug Module
Command Sequence:
WAREG/WDREG
Operand Data: Longword data is written into the specified address or data register. The data is
supplied most-significant word first.
Result Data: Command complete status is indicated by returning 0xFFFF (with S cleared)
when the register write is complete.
34.4.1.5.3 Read Memory Location (
Read data at the longword address. Address space is defined by BAAR[TT,TM]. Hardware forces
low-order address bits to 0s for word and longword accesses to ensure that word addresses are
word-aligned and longword addresses are longword-aligned.
Command/Result Formats:
Byte
Command
Result
Word Command
Result
Longword Command
Result
34-35
MS DATA
??? 'NOT READY'
XXX
BERR
Figure 34-24. /
WAREG
READ
15 14 13 12 11
0x1
X X X X X
0x1
0x1
Figure 34-25.
READ
LS DATA
'NOT READY' 'CMD COMPLETE'
NEXT CMD
'NOT READY'
Command Sequence
WDREG
)
10 9 8 7 6
0x9 0x0
A[31:16]
A[15:0]
X X X
0x9 0x4
A[31:16]
A[15:0]
D[15:0]
0x9 0x8
A[31:16]
A[15:0]
D[31:16]
D[15:0]
Command/Result Formats
NEXT CMD
5 4 3 2 1
0x0
D[7:0]
0x0
0x0
Freescale Semiconductor
0