Functional Description - Freescale Semiconductor MCF54455 Reference Manual

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Serial Boot Facility (SBF)
Field
3–0
Boot loader clock divider. Determines the SBF clock (PLL input reference clock) divisor that generates the serial shift
BLDIV
clock output on SBF_CK. Prior to the serial boot sequence, a divisor of 67 is used.
During the serial boot sequence, this field is loaded with the value read from the SPI memory. The application may
write to this register to change the divisor for any subsequent serial boot that follows a soft-reset condition.
Because this register is write-once, the application must write the value for this field in the same write that the FR bit
is written (regardless of the value written to the FR bit). Any subsequent writes to this field prior to a power-on reset
event terminate without effect.
BLDIV
0000
0001
0010
0011
0100
0101
0110
0111
12.4

Functional Description

When enabled, the SBF inserts three additional steps into the normal system boot process:
Serial initialization and shift clock frequency adjustment
Reset configuration and optional boot load
Execution transfer
12.4.1
Serial Initialization and Shift Clock Frequency Adjustment
The following sequence is followed during a serial boot sequence:
1. The SBF is engaged when BOOTMOD[1:0] = 11 concurrent with the release of a pending source
of reset (power-on, software watchdog, RESET pin, etc.).
2. Boot-up is paused.
3. The weak internal pull-up on SBF_DI is enabled. This allows a 1-to-0 transition to register when
the SPI memory output switches from high-impedance to logic 0.
4. The SBF shifts the standard SPI memory read command (0x03) followed by repeated 0x00 address
bytes to the SPI memory at f
12-4
Table 12-4. SBFCR Field Descriptions (continued)
Shift Clock
Ideal
Divisor
High Time
Low Time
(f
Ticks)
(f
ref
ref
1
Bypass
Bypass
2
1
3
2
4
2
5
3
7
4
10
5
13
7
 60.
REF
Description
Ideal
BLDIV
Divisor
Ticks)
1000
14
1
1001
17
1
1010
25
2
1011
33
2
1100
34
3
1101
50
5
1110
67
6
1111
Shift Clock
High Time
Low Time
(f
Ticks)
(f
Ticks)
ref
ref
7
7
9
8
13
12
17
16
17
17
25
25
34
33
Reserved
Freescale Semiconductor

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