Cau Commands - Freescale Semiconductor MCF54455 Reference Manual

24.3.3

CAU Commands

The CAU supports the commands shown in
bit is set if an undefined command is issued. A specific illegal command (
self-checking. Reserved commands should not be issued to ensure compatibility with future
implementations.
The CMD field specifies the CAU command for the instruction.
Command
Inst Type
Name
cp0ld
CNOP
cp0ld
LDR
cp0st
STR
cp0ld
ADR
cp0ld
RADR
cp0ld
ADRA
cp0ld
XOR
cp0ld
ROTL
cp0ld
MVRA
cp0ld
MVAR
cp0ld
AESS
cp0ld
AESIS
cp0ld
AESC
cp0ld
AESIC
cp0ld
AESR
cp0ld
AESIR
cp0ld
DESR
cp0ld
DESK
cp0ld
HASH
cp0ld
SHS
cp0ld Message Digest Shift
MDS
cp0ld
ILL
Freescale Semiconductor
Table
Table 24-5. CAU Commands
Description
8 7
No Operation
Load Reg
Store Reg
Add
Reverse and Add
Add Reg to Acc
Exclusive Or
Rotate Left
Move Reg to Acc
Move Acc to Reg
AES Sub Bytes
AES Inv Sub Bytes
AES Column Op
AES Inv Column Op
AES Shift Rows
AES Inv Shift Rows
DES Round
DES Key Setup
Hash Function
Secure Hash Shift
Illegal Command
24-5. All other encodings are reserved. The CASR[IC]
CMD
6 5 4 3 2 1
0x000
0x01 CAx
0x02 CAx
0x03 CAx
0x04 CAx
0x05 CAx
0x06 CAx
0x07 CAx
0x08 CAx
0x09 CAx
0x0A CAx
0x0B CAx
0x0C CAx
0x0D CAx
0x0E0
0x0F0
0x10 IP FP KS[1:0]
0x11 0 0 CP DC DES Key Op(CA0-CA1)
0x12 0 HF[2:0]
0x130
0x140
0x1F0
Cryptographic Acceleration Unit (CAU)
) is defined to allow software
ILL
Operation
0
—

Op1 CAx

CAx Result

CAx + Op1
CAx + ByteRev(Op1)

CAx + CAA

CAx ^ Op1 CAx

CAx <<< Op1

CAx CAA

CAA CAx

SubBytes(CAx)
InvSubBytes(CAx)
MixColumns(CAx)^Op1
InvMixColumns(CAx^Op1)

ShiftRows(CA0-CA3)
InvShiftRows(CA0-CA3)
CA0-CA3

DES Round(CA0-CA3)

Key Parity Error & CP
Hash Func(CA1-CA3)+CAA

CAA <<< 5 CAA,
 
CAA CA0, CA0

CA1 <<< 30
 
CA2 CA3, CA3
 
CA3 CAA, CAA
 
CA1 CA2, CA2

0x1 CASR[0]
CAx

CAx
CAA
CAx
CAx

CAx

CAx

CAx
CA0-CA3

CA0-CA3

CA0-CA1
CASR[1]

CAA
CA1,
CA2,
CA4
CA1,
CA3,
24-6