Freescale Semiconductor MCF54455 Reference Manual page 241

Universal Serial Bus Interface – On-The-Go Module
Field
31–30 Port transceiver select. Controls which parallel transceiver interface is selected.
PTS 00 Reserved
01 Reserved
10 ULPI parallel interface
11 FS/LS on-chip transceiver
This bit is not defined in the EHCI specification.
29 Reserved, must be set.
28 Reserved, must be cleared.
27–26 Port speed. This read-only register field indicates the speed the port operates. This bit is not defined in the EHCI
PSPD specification.
00 Full speed
01 Low speed
10 High speed
11 Undefined
25 Reserved, must be cleared.
24 Port force full-speed connect. Disables the chirp sequence that allows the port to identify itself as a HS port. useful
PFSC for testing FS configurations with a HS host, hub, or device. Not defined in the EHCI specification.
0 Allow the port to identify itself as high speed.
1 Force the port to only connect at full speed.
This bit is for debugging purposes.
23 PHY low power suspend. This bit is not defined in the EHCI specification.
PHCD Host mode:
The PHY can be placed into low-power suspend when downstream device is put into suspend mode or when no
downstream device connects. Software completely controls low-power suspend.
Device mode:
For the USB OTG module in device mode, the PHY can be put into low power suspend when the device is not
running (USBCMD[RS] = 0) or suspend signaling is detected on the USB. The PHCD bit is cleared automatically
when the resume signaling is detected or when forcing port resumes.
0 Normal PHY operation.
1 Signal the PHY to enter low-power suspend mode
Reading this bit indicates the status of the PHY.
22 Wake on over-current enable. Enables the port to be sensitive to over-current conditions as wake-up events. This
WKOC field is 0 if the PP bit is cleared. In host mode, this bit can work with an external power control circuit.
21 Wake on disconnect enable. Enables the port to be sensitive to device disconnects as wake-up events.
WKDS This field is 0 if the PP bit is cleared or the module is in device mode. In host mode, this bit can work with an external
power control circuit.
20 Wake on connect enable. Enables the port to be sensitive to device connects as wake-up events.
WLCN This field is 0 if the PP bit is cleared or the module is in device mode. In host mode, this can work with an external
power control circuit.
10-34
Table 10-33. PORTSC1 Field Descriptions
Description
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