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10.5.4.1.2
Error Interrupts
Error interrupts are least frequent and should be placed last in the interrupt service routine.
Interrupt
USB Error Interrupt.
System Error
10.5.5
Deviations from the EHCI Specifications
The host mode operation of the USB OTG module is nearly EHCI-compatible with a few minor
differences. For the most part, the modules conform to the data structures and operations described in
Section 3, "Data Structures," and Section 4, "Operational Model," in the EHCI specification. The
particulars of the deviations occur in the following areas:
•
Embedded transaction translator—Allows direct attachment of FS and LS devices in host mode
without the need for a companion controller.
•
Device operation—In host mode, the device operational registers are generally disabled; therefore,
device mode is mostly transparent when in host mode. However, there are a couple exceptions
documented in the following sections.
•
Embedded design interface—The module does not have a PCI Interface and therefore the PCI
configuration registers described in the EHCI specification are not applicable.
For the purposes of the USB OTG implementing a dual-role host/device controller with support for OTG
applications, it is necessary to deviate from the EHCI specification. Device and OTG operation are not
specified in the EHCI specification, and thus the implementation supported in the USB OTG module is
proprietary.
10.5.5.1
Embedded Transaction Translator Function
The USB host mode supports directly connected full- and low-speed devices without requiring a
companion controller by including the capabilities of a USB 2.0 high-speed hub transaction translator.
Although there is no separate transaction translator block in the system, the transaction translator function
normally associated with a high-speed hub is implemented within the DMA and protocol engine blocks.
The embedded transaction translator function is an extension to EHCI interface, but makes use of the
standard data structures and operational models existing in the EHCI specification to support full- and
low-speed devices.
10.5.5.1.1
Capability Registers
These additions to the capability registers support the embedded Transaction translator function:
•
N_TT added to HSCPARAMS - Host Controller Structural Parameters
•
N_PTT added to HSCPARAMS - Host Controller Structural Parameters
Freescale Semiconductor
Table 10-62. Error Interrupt Events
This error is redundant because it combines USB interrupt and an error status in the dTD.
The DCD more aptly manages packet-level errors by checking the dTD status field upon
receipt of USB interrupt (w/ EPCOMPLETE).
Unrecoverable error. Immediate reset of module; free transfers buffers in progress and
restart the DCD.
Universal Serial Bus Interface – On-The-Go Module
Action
10-75
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