Freescale Semiconductor MCF54455 Reference Manual page 441

Enhanced Direct Memory Access (eDMA)
eDMA
eDMA Engine
Read Data
Data Path
Write Data
Address
In the second part of the basic data flow
(address path, data path, and control) sequence through the required source reads and destination writes to
perform the actual data movement. The source reads are initiated and the fetched data is temporarily stored
in the data path block until it is gated onto the internal bus during the destination write. This source
read/destination write processing continues until the minor byte count has transferred.
19-26
Program Model/
Channel Arbitration
Address Path
eDMA Peripheral
Figure 19-29. eDMA Operation, Part 1
(Figure 19-30), the modules associated with the data transfer
Write Data
Transfer
Control
Descriptor (TCD)
64
Control
eDMA Done
Request
Freescale Semiconductor
Write Address
0
1
2
n-1
Read Data