Motorola PowerQUICC II MPC8280 Series Reference Manual page 391

9.11.2.28 Initializing the PCI Configuration Registers
The configuration registers are initialized to the reset values shown in the register
descriptions. However, they can also be initialized to user-defined values loaded directly
from the EEPROM used to configure the MPC8280 by setting the ALD_EN (auto-load
enable) bit in the hard reset configuration word; refer to Section 5.4.1, "Hard Reset
Configuration Word."
To initialize configuration registers from an EEPROM, the user builds a contiguous table
of register initialization data structures in a user-defined space within the EEPROM. Each
data structure, shown in Figure 9-58, contains the address of a specific register and its
initialization data, as well as some control information. The last data structure entry in the
table is marked by setting its 'Last' bit.
Offset from the table
start address
0
0x00
0x04
0x08
0x0C
Figure 9-58. Data Structure for Register Initialization
Table 9-45 describes the data structure fields.
Table 9-45. Bit Settings for Register Initialization Data Structure
Offset Bits
0x00 0–31
0x04 0–28
29
30–31
0x08 0–31
Note that the data structure description assumes the following:
• Addresses refer to 60x bus addresses.
• Address and data byte ordering are big-endian.
MOTOROLA
Freescale Semiconductor, Inc.
—
Name
Address Contains the absolute destination address to which the data is written.
— Reserved, should be cleared.
Last Indicates that this is the last initialization transaction to be performed.
0 Not last transaction
1 Last transaction
SIZE Data size in bytes
00 4 bytes
01 1 byte
10 2 bytes
11 3 bytes
Data Contains the data to be written to the specified address. Data bytes are
written according to the value specified in the SIZE field and according
to big-endian byte ordering.
Chapter 9. PCI Bridge
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28
Destination address
Destination data
•
•
•
Description
Configuration Registers
29 30 31
Last Size[1:0]
9-69