Motorola PowerQUICC II MPC8280 Series Reference Manual page 382

Configuration Registers
Table 9-34. Subsystem Vendor ID Register Description
Bits Name
15–0 Vendor ID
9.11.2.16 Subsystem Device ID Register
Figure 9-48 and Table 9-35 describe the subsystem ID register.
15
Field
Reset
R/W
Addr
Table 9-35. Subsystem Device ID Description Register
Bits Name
15–0 Subsystem ID
9.11.2.17 PCI Bus Capabilities Pointer Register
Figure 9-49 and Table 9-36 describe the PCI bus capabilities pointer register.
7
Field
Reset
R/W
Addr
Figure 9-49. PCI Bus Capabilities Pointer Register
Table 9-36. PCI Bus Capabilities Pointer Register Description
Bits Name
7–0 Capabilities pointer
9-60
Freescale Semiconductor, Inc.
Identifies the add-in board or subsystem where the PCI device resides.
0000_0000_0000_0000
Figure 9-48. Subsystem Device ID Register
Identifies the add-in board or subsystem where the PCI device resides.
Specifies the byte offset in the configuration space containing the first item in the
capabilities list.
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Description
SDID
R/W
0x2E
Description
CP
0100_1000
R
0x34
Description
0
0
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