Motorola PowerQUICC II MPC8280 Series Reference Manual page 370

Configuration Registers
31 30 29
NO_
Field EN SNOOP_ PRE
EN
Reset
R/W
Addr
15
Field
Reset
R/W
Addr
Figure 9-31. PCI Inbound Comparison Mask Registers (PICMRx)
Table 9-18 describes PICMRx.
Bits Name
31 Enable
30 NO_SNOOP_EN
29 Prefetchable
28–20 —
19–0 Comparison mask
9-48
Freescale Semiconductor, Inc.
28
0000_0000_0000_0000
0x108FA (PICMR0); 0x108E2 (PICMR1)
0000_0000_0000_0000
0x108F8 (PICMR0); 0x108E0 (PICMR1)
Table 9-18. PICMRx Field Descriptions
Setting this bit enables address translation
Controls whether the PCI bridge generates snoop transactions on the 60x bus for
PCI-to-60x memory transactions which hit in this address translation window.
Disabling snooping is a performance enhancement for systems that do not need to
maintain coherency on system memory accesses by PCI.
0 Snooping is enabled.
1 Snooping is disabled.
Indicates whether the address space is prefetchable so that streaming can occur.
0 not prefetchable
1 prefetchable
Reserved, should be cleared.
Indicates the size of the space to be translated. The value in the register represents
which of the most significant address bits to compare for a window match.
Non-contiguous comparison mask bits cause unpredictable behavior.
Examples:
PICMR = 0b0xxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
Inbound window is disabled.
PICMR = 0b1xxx_xxxx_xxxx_1111_1111_1111_1111_1111
The mask is 20 bits (physical address bits 31-12) which corresponds to a 4Kbyte
window size. This is the smallest window size allowed.
PICMR = 0b1xxx_xxxx_xxxx_1111_1111_1111_0000_0000
The mask is 12 bits (physical address bits 31-20) which corresponds to a 1Mbyte
window size.
MPC8280 PowerQUICC II Family Reference Manual
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20
—
R/W
CM
R/W
Description
19 16
CM
0
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