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Table 3-17. GDOx Signal Selection (x = 0, 1, or 2) (continued)
GDOx_CFG[5:0]
DESCRIPTION
48 (0x30)
CLK_XOSC/1
49 (0x31)
CLK_XOSC/1.
5
50 (0x32)
CLK_XOSC/2
51 (0x33)
CLK_XOSC/3
52 (0x34)
CLK_XOSC/4
53 (0x35)
CLK_XOSC/6
54 (0x36)
CLK_XOSC/8
55 (0x37)
CLK_XOSC/12
56 (0x38)
CLK_XOSC/16 to values less than 0x30. The GDO0 default value is CLK_XOSC/192.
57 (0x39)
CLK_XOSC/24
58 (0x3A)
CLK_XOSC/32
59 (0x3B)
CLK_XOSC/48
60 (0x3C)
CLK_XOSC/64
61 (0x3D)
CLK_XOSC/96
62 (0x3E)
CLK_XOSC/12
8
63 (0x3F)
CLK_XOSC/19
2
3.26 Asynchronous and Synchronous Serial Operation
Several features and modes of operation have been included in the CC11x1-Q1 to provide backward
compatibility with previous Chipcon products and other existing RF communication systems. For new
systems, it is recommended to use the built-in packet handling features, as they can give more robust
communication, significantly offload the microcontroller, and simplify software development.
3.26.1 Asynchronous Operation
For backward compatibility with systems already using the asynchronous data transfer from other Chipcon
products, asynchronous transfer is also included in CC11x1-Q1. When asynchronous transfer is enabled,
several of the support mechanisms for the MCU that are included in CC11x1-Q1 are disabled, such as
packet handling hardware, buffering in the FIFO, and so on. The asynchronous transfer mode does not
allow the use of the data whitener, interleaver, and FEC, and it is not possible to use Manchester
encoding.
MSK is not supported for asynchronous transfer.
Setting PKTCTRL0.PKT_FORMAT to 3 enables asynchronous serial mode.
In TX, the GDO0 pin is used for data input (TX data). Data output can be on GDO0, GDO1, or GDO2.
This is set by the IOCFG0.GDO0_CFG, IOCFG1.GDO1_CFG and IOCFG2.GDO2_CFG fields.
The CC11x1-Q1 modulator samples the level of the asynchronous input 8 times faster than the
programmed data rate. The timing requirement for the asynchronous stream is that the error in the bit
period must be less than one eighth of the programmed data rate.
3.26.2 Synchronous Serial Operation
Setting PKTCTRL0.PKT_FORMAT to 1 enables synchronous serial mode. In the synchronous serial
Copyright © 2009–2010, Texas Instruments Incorporated
Note: There are 3 GDO pins, but only one CLK_XOSC/n can be selected as an output at any time. If
CLK_XOSC/n is to be monitored on one of the GDO pins, the other two GDO pins must be configured
To optimize RF performance, these signal should not be used while the radio is in RX or TX mode.
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SWRS076B – 11-07-22-013 - APRIL 2009 – REVISED APRIL 2010
NOTE
CC11x1-Q1
Detailed Description
59
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