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Notes: 1. φ
2. φ
3. The error in table 10.6 is the value obtained from the following equation, rounded to two
decimal places.
B (rate obtained from n, N, OSC) — R (bit rate in left-hand column in table 10.6.)
Error (%) =
Table 10.8 shows the maximum bit rate for each frequency. The values shown are for active
(high-speed) mode.
Table 10.8 Maximum Bit Rate for Each Frequency (Asynchronous Mode)
OSC (MHz)
0.0384*
2
2.4576
4
10
16
Note:
* When SMR is set up to CKS1 = "0", CKS0 = "1".
Table 10.9 shows examples of BRR settings in synchronous mode. The values shown are for
active (high-speed) mode.
/2 clock is selected in active (medium- and high-speed) or sleep
W
(medium- and high-speed) mode.
clock is selected in subactive or subsleep mode. SCI3 can be used only
W
when the φ
/2 is selected as the CPU clock in subactive or subsleep mode.
W
R (bit rate in left-hand column in table 10.6.)
Maximum Bit Rate (bit/s)
600
31250
38400
62500
156250
250000
Section 10 Serial Communication Interface
Setting
n
0
0
0
0
0
0
Rev. 6.00 Aug 04, 2006 page 367 of 680
× 100
N
0
0
0
0
0
0
REJ09B0145-0600
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