Configuration Overview; Gpio Control Registers; Gpio Trip Input Select Registers - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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4.2.3 Configuration Overview

The pin function assignments, input qualification, and the external interrupt sources are all controlled by
the GPIO configuration control registers. In addition, you can assign pins to wake the device from the
HALT and STANDBY low power modes and enable/disable internal pullup resistors.
Table 4-38 list the registers that are used to configure the GPIO pins to match the system requirements.
(1)
Name
GPACTRL
GPAQSEL1
GPAQSEL2
GPAMUX1
GPAMUX2
GPADIR
GPBCTRL
GPBQSEL1
GPBQSEL2
GPBMUX1
GPBMUX2
GPBDIR
GPCCTRL
GPCQSEL1
GPCMUX1
GPCDIR
GPECTRL
GPEQSEL1
GPEMUX1
GPEDIR
GPEPUD
AIOMUX1
AIOMUX2
AIODIR
(1)
An X in a table cell indicates the bit can be 0 or 1.
(1)
Name
GPTRIP1SEL
GPTRIP2SEL
GPTRIP3SEL
GPTRIP4SEL
(1)
In Master Receive mode, a STOP condition should be generated only after a Data Negative Acknowledge executed by the
master or an Address Negative Acknowledge executed by the slave.
SPRUH22I – April 2012 – Revised November 2019
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Table 4-37. GPIO Control Registers
Address Size (x16)
0x5F80 2
0x5F82 2
0x5F84 2
0x5F86 2
0x5F88 2
0x5F8A 2
0x5F90 2
0x5F92 2
0x5F94 2
0x5F96 2
0x5F98 2
0x5F9A 2
0x5FA0 2
0x5FA2 2
0x5FA6 2
0x5FAA 2
0x6F80 2
0x6F82 2
0x6F86 2
0x6F8A 2
0x6F8C 2
0x6FB6 2
0x6FB8 2
0x6FBA 2
Table 4-38. GPIO Trip Input Select Registers
Address Size (x16)
0x5FE0 1
0x5FE1 1
0x5FE2 1
0x5FE3 1
Copyright © 2012–2019, Texas Instruments Incorporated
C28 General-Purpose Input/Output (GPIO)
Table 4-37
Register Description
GPIO A Control Register (GPIO0 - GPIO31)
GPIO A Qualifier Select 1 Register (GPIO0 -
GPIO15)
GPIO A Qualifier Select 2 Register (GPIO16 -
GPIO31)
GPIO A MUX 1 Register (GPIO0 - GPIO15)
GPIO A MUX 2 Register (GPIO16 - GPIO31)
GPIO A Direction Register (GPIO0 - GPIO31)
GPIO B Control Register (GPIO32 - GPIO63)
GPIO B Qualifier Select 1 Register (GPIO32 -
GPIO47)
GPIO B Qualifier Select 2 Register (GPIO48 -
GPIO63)
GPIO B MUX 1 Register (GPIO32 - GPIO47)
GPIO B MUX 2 Register (GPIO48 - GPIO63)
GPIO B Direction Register (GPIO32 - GPIO63)
GPIO C Control Register (GPIO68 to GPIO71)
GPIO C Qualifier Select 1 Register (GPIO68 -
GPIO71)
GPIO C MUX 1 Register (GPIO68 - GPIO71)
GPIO C Direction Register (GPIO68 - GPIO71)
GPIO E Control Register (GPIO128 - GPIO135)
GPIO E Qualifier Select 1 Register (GPIO128 -
GPIO135)
GPIO E MUX 1 Register (GPIO128 - GPIO135)
GPIO E Direction Register (GPIO128 - GPIO135)
GPIO E Pull Up Disable Register (GPIO128 -
GPIO135)
Analog IO MUX 1 Register (AIO0 to AIO15)
Analog IO MUX 2 Register (AIO16 to AIO31)
Analog IO Direction Register (AIO0 AIO31)
Description
GPTRIP1 (TZ1n) Input Select Register (GPIO0 -
GPIO63)
GPTRIP2 (TZ2n, ADCEXTTRIG) Input Select
Register (GPIO0 - GPIO63)
GPTRIP3 (TZ3n) Input Select Register (GPIO0 -
GPIO63)
GPTRIP4 (XINT1) Input Select Register (GPIO0 -
GPIO63)
General-Purpose Input/Output (GPIO)
and
375