Xilinx Virtex-6 Manual page 37

ADDMACC_MACRO
Macro: Adder/Multiplier/Accumulator
Introduction
The ADDMACC _MACRO simplifies the instantiation of the DSP48 block when used as a pre-add, multiply
accumulate function. It features parameterizable input and output widths and latency that ease the integration of
DSP48 block into HDL.
Port Description
Name Direction
Output Ports
PRODUCT Output
Input Ports
PREADD1 Input
PREADD2 Input
MULTIPLIER Input
CARRYIN Input
CLK Input
CE Inupt
LOAD Input
Virtex-6 Libraries Guide for HDL Designs
UG623 (v 14.5) March 20, 2013
Width
Variable width, equals the value
of the WIDTH_A attibute plus the
value of the WIDTH_B attribute.
Variable, see WIDTH_PREADD
attribute.
Variable, see WIDTH_PREADD
attribute.
Variable, see
WIDTH_MULTIPLIER attribute.
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Chapter 2: About Unimacros
Function
Primary data output.
Preadder data input.
Preadder data input
Multiplier data input
Carry input
Clock
Clock enable
Load
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