Xilinx Virtex-6 Manual page 153

IBUFDS_GTHE1
Primitive: Differential Clock Input for the GTH Transceiver Reference Clocks
Introduction
This component is the dedicated differential clock input for the GTH transceiver reference clocks. There is one
IBUFGDS_GTHE1 component per GTH quad and it connects directly to the REFCLK pin of the GTHE1_QUAD
primitive.
Design Entry Method
To instantiate this component, use the Virtex-6 FPGA GTH Transceivers Wizard or an associated core containing
the component. Xilinx does not recommend direct instantiation of this component.
For More Information
• See the Virtex-6 FPGA GTH Transceivers User Guide
• See the Virtex-6 FPGA User Documentation (User Guides and Data
Virtex-6 Libraries Guide for HDL Designs
UG623 (v 14.5) March 20, 2013
(UG371).
Sheets).
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Chapter 4: About Design Elements
153