Xilinx Virtex-6 Manual page 175

Available Attributes
Data
Attribute Type
IOSTANDARD String
VHDL Instantiation Template
Unless they already exist, copy the following two statements and paste them before the entity declaration.
Library UNISIM;
use UNISIM.vcomponents.all;
-- IOBUFDS: Differential Bi-directional Buffer
-- Virtex-6
-- Xilinx HDL Libraries Guide, version 14.5
IOBUFDS_inst : IOBUFDS
generic map (
IOSTANDARD => "BLVDS_25")
port map (
O => O, -- Buffer output
IO => IO, -- Diff_p inout (connect directly to top-level port)
IOB => IOB, -- Diff_n inout (connect directly to top-level port)
I => I, -- Buffer input
T => T -- 3-state enable input, high=input, low=output
);
-- End of IOBUFDS_inst instantiation
Verilog Instantiation Template
// IOBUFDS: Differential Bi-directional Buffer
// Virtex-6
// Xilinx HDL Libraries Guide, version 14.5
IOBUFDS #(
.IOSTANDARD("BLVDS_25")
) IOBUFDS_inst (
.O(O), // Buffer output
.IO(IO), // Diff_p inout (connect directly to top-level port)
.IOB(IOB), // Diff_n inout (connect directly to top-level port)
.I(I), // Buffer input
.T(T) // 3-state enable input, high=input, low=output
);
// End of IOBUFDS_inst instantiation
For More Information
See the Virtex-6 FPGA User Documentation (User Guides and Data
Virtex-6 Libraries Guide for HDL Designs
UG623 (v 14.5) March 20, 2013
Allowed Values Default
See Data Sheet "DEFAULT"
// Specify the I/O standard
www.xilinx.com
Chapter 4: About Design Elements
Description
Assigns an I/O standard to the element.
Sheets).
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