Xilinx Virtex-6 Manual page 357

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Port
Direction
M
Input
PROGB
Input
RDWRB
Input
Design Entry Method
Instantiation
Inference
CORE Generator™ and wizards
Macro support
Xilinx suggests that you instantiate this in the testbench file and not an implementation file or file used during
synthesis of the design. It may be used in conjunction with the design in order to help determine interaction and
start-up sequences between configuration loading and device start-up. In general, a configuration bitstream file
is to be used in conjunction with this model in order to observe configuration behavior.
More information on simulating and using this component can be found in the Xilinx Synthesis and Simulation
Design Guide. Please refer to that guide for further detail on using this component.
Available Attributes
Attribute
Data Type
DEVICE_ID
32-bit
hexadecimal
VHDL Instantiation Template
Unless they already exist, copy the following two statements and paste them before the entity declaration.
Library UNISIM;
use UNISIM.vcomponents.all;
-- SIM_CONFIG_V6: Behavioral Simulation-only Model of FPGA SelectMap Configuration
--
Virtex-6
-- Xilinx HDL Libraries Guide, version 14.5
SIM_CONFIG_V6_inst : SIM_CONFIG_V6
generic map (
ICAP_SUPPORT => FALSE,
ICAP_WIDTH => "X8",
DEVICE_ID => X"00000000")
port map (
BUSY => BUSY,
-- 1-bit output Busy pin
CSOB => CSOB,
-- 1-bit output chip select pin
DONE => DONE,
-- 1-bit bi-directional Done pine
CCLK => CCLK,
-- 1-bit input configuration clock
D => D,
-- 8-bit bi-directional configuration data
Virtex-6 Libraries Guide for HDL Designs
UG623 (v 14.5) March 20, 2013
Width
Function
2
Mode pins - determine configuration mode.
1
Active-Low asynchronous full-chip reset.
1
Determines the direction of the D[x:0] data bus:
0 = inputs
1 = outputs
RDWR_B input can only be changed while CSI_B is deasserted,
otherwise an ABORT occurs
In testbench or simulation-only file.
No
No
No
Allowed Values
Valid device ID codes
-- Using ICAP, TRUE or FALSE
-- ICAP width, "X8", "X16", "X32"
-- Do not need to change/specify if
-- ICAP_SUPPORT-FALSE
-- Specifies the Pre-programmed Device ID value
www.xilinx.com
Chapter 4: About Design Elements
Default
Description
32'h00000000
Specify the Device ID code for the
target device. Used during bitstream
processing and device identification
reads.
357

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