Xilinx Virtex-6 Manual page 209

LUT3_D
Macro: 3-Bit Look-Up Table with Dual Output
Introduction
This design element is a 3-bit look-up table (LUT) with two functionally identical outputs, O and LO.
The O output is a general interconnect. The LO output is used to connect to another input within the same CLB
slice and to the fast connect buffer. A mandatory INIT attribute, with an appropriate number of hexadecimal
digits for the number of inputs, must be attached to the LUT to specify its function.
The INIT parameter for the FPGA LUT primitive is what gives the LUT its logical value. By default, this value is
zero, thus driving the output to a zero regardless of the input values (acting as a ground). However, in most
cases a new INIT value must be determined in order to specify the logic function for the LUT primitive. There
are at least two methods by which the LUT value can be determined:
• The Logic Table Method -A common method to determine the desired INIT value for a LUT is using a logic
table. To do so, simply create a binary logic table of all possible inputs, specify the desired logic value of
the output and then create the INIT string from those output values.
• The Equation Method -Another method to determine the LUT value is to define parameters for each input
to the LUT that correspond to their listed truth value and use those to build the logic equation. This method
is easier to understand once you have grasped the concept and is more self-documenting than the above
method. However, this method does require the code to first specify the appropriate parameters.
Logic Table
Inputs
I2 I1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
INIT = Binary equivalent of the hexadecimal number assigned to the INIT attribute
Design Entry Method
Instantiation
Inference
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Macro support
Virtex-6 Libraries Guide for HDL Designs
UG623 (v 14.5) March 20, 2013
Outputs
I0 O
0 INIT[0]
1 INIT[1]
0 INIT[2]
1 INIT[3]
0 INIT[4]
1 INIT[5]
0 INIT[6]
1 INIT[7]
Yes
Recommended
No
No
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Chapter 4: About Design Elements
LO
INIT[0]
INIT[1]
INIT[2]
INIT[3]
INIT[4]
INIT[5]
INIT[6]
INIT[7]
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