Instantiation Inference; Library Unisim; Use Unisim.vcomponents.all - Xilinx Virtex-6 Manual

Chapter 4: About Design Elements
Inputs
I3 I2
1 1
1 1
1 1
INIT = Binary equivalent of the hexadecimal number assigned to the INIT attribute
Design Entry Method
Instantiation
Inference
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Macro support
Available Attributes
Attribute Data Type
INIT
Hexadecimal
VHDL Instantiation Template
Unless they already exist, copy the following two statements and paste them before the entity declaration.
Library UNISIM;
use UNISIM.vcomponents.all;
-- LUT4_L: 4-input Look-Up Table with local output
-- Virtex-6
-- Xilinx HDL Libraries Guide, version 14.5
LUT4_L_inst : LUT4_L
generic map (
INIT => X"0000")
port map (
LO => LO, -- LUT local output
I0 => I0, -- LUT input
I1 => I1, -- LUT input
I2 => I2, -- LUT input
I3 => I3 -- LUT input
);
-- End of LUT4_L_inst instantiation
220
I1 I0
0 1
1 0
1 1
Yes
Recommended
No
No
Allowed Values
Any 16-Bit Value
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Outputs
LO
INIT[13]
INIT[14]
INIT[15]
Default Description
All zeros Initializes look-up tables.
Virtex-6 Libraries Guide for HDL Designs
UG623 (v 14.5) March 20, 2013