Xilinx Virtex-6 Manual page 3

Introduction
This HDL guide is part of the ISE® documentation collection. A separate version of this
guide is available if you prefer to work with schematics.
This guide contains the following:
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About Design Elements
This version of the Libraries Guide describes the valid design elements for Virtex®-6
devices, and includes examples of instantiation code for each element. Instantiation
templates are also supplied in a separate ZIP file, which you can find in your installation
directory under ISE/doc/usenglish/isehelp.
Design elements are divided into three main categories:
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CORE Generator maintains software libraries with hundreds of functional design
elements (UniMacros and primitives) for different device architectures. New functional
elements are assembled with each release of development system software. In addition
to a comprehensive Unified Library containing all design elements, this guide is one in
a series of architecture-specific libraries.
Virtex-6 Libraries Guide for HDL Designs
UG623 (v 14.5) March 20, 2013
Introduction.
Descriptions of each available macro.
A list of design elements supported in this architecture, organized by functional
categories.
Descriptions of each available primitive.
Macros - These elements are in the UniMacro library in the Xilinx tool, and are used
to instantiate primitives that are complex to instantiate by just using the primitives.
The synthesis tools will automatically expand the unimacros to their underlying
primitives.
Primitives - Xilinx components that are native to the FPGA you are targeting. If you
instantiate a primitive in your design, after the translation process (ngdbuild) you
will end up with the exact same component in the back end. For example, if you
instantiate the Virtex®-5 element known as ISERDES_NODELAY as a user primitive,
after you run translate (ngdbuild) you will end up with an ISERDES_NODELAY
in the back end as well. If you were using ISERDES in a Virtex-5 device, then this
will automatically retarget to an ISERDES_NODELAY for Virtex-5 in the back end.
Hence, this concept of a "primitive" differs from other uses of that term in this
technology.
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