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Xilinx Virtex-7 VC7222 User Manual

Xilinx Virtex-7 VC7222 User Manual

Fpga gth and gtz transceiver characterization board
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Virtex-7 FPGA VC7222
GTH and GTZ Transceiver
Characterization Board
User Guide
UG965 (v1.4) February 11, 2015

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Summary of Contents for Xilinx Virtex-7 VC7222

  • Page 1 Virtex-7 FPGA VC7222 GTH and GTZ Transceiver Characterization Board User Guide UG965 (v1.4) February 11, 2015...

  • Page 2: Revision History

    (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same.

  • Page 3: Table Of Contents

    Appendix D: Additional Resources Xilinx Resources ............61 Solution Centers .
  • Page 4 VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...

  • Page 5: Chapter 1: Vc7222 Board Features And Operation

    Two VITA 57.1 FPGA mezzanine card (FMC) high pin count (HPC) connectors • USB-to-UART bridge • I2C bus • PMBus connectivity to onboard digital power supplies • Active cooling for the FPGA VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...

  • Page 6: Detailed Description

    Do not remove the rubber feet from the board. The feet provide clearance to prevent short circuits on the back side of the board. Note: Figure 1-2 is for reference only and might not reflect the current revision of the board. www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 7 GTZ transceiver reference clock SMAs USB JTAG connector (micro-B receptacle) JTAG connector (alternate access for programming cables) System ACE SD card connector (back-side of board) System ACE SD configuration address DIP switches VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 8 FMC1 connector FMC2 connector J98, J99, J100, J101 SMA connectors to differential MRCC pins on FPGA Jumpers and potentiometer for XADC reference J141, J142, R233 and analog supply set-up www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 9 Caution! When supplying 12V through J2, use only the power supply provided for use with this board (Xilinx part number 3800033). Caution! Do NOT use a 6-pin, PC ATX power supply connector with J2. The pinout of the 6-pin, PC ATX connector is not compatible J2 and the board will be damaged if an attempt is made to power it from a PC ATX power supply connector.
  • Page 10 Figure 1-3: VC7222 Board Power Supply Block Diagram The VC7222 board uses power regulators and PMBus compliant digital PWM system controllers from Texas Instruments to supply the FPGA logic and utility voltages listed in www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback...
  • Page 11 13). Transceiver supply voltages cannot be changed from this controller. 4. For information on XADC see 7 Series FPGAs and Zynq-7000 All Programmable SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter User Guide (UG480) [Ref VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 12 J75 (callout 22, Figure 1-2). Caution! The core power terminal block J75 has a maximum load current contact rating of 24A. www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 13 Texas Instruments PMP6577 and Bellnix BPE-37. Either of the two GTH modules can be plugged into connectors J29 and J102 in the outlined and labeled power module location shown in Figure 1-6. VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 14 7 series GTH modules included with the VC7222 board. Table 1-3: 7 Series GTH Transceiver Power Module GTH Transceiver Rail Nominal Voltage Maximum Current Rating Net Name MGTAVCC 1.05V MGTAVTT 1.2V MGTVCCAUX 1.8V 2.6A www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 15 Texas Instruments PMP6577 and Bellnix BPE-37. Either of the two GTZ modules can be plugged into connectors J5 and J71 in the outlined and labeled power module location shown in Figure 1-8. VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 16 7 series GTZ modules included with the VC7222 board. Table 1-4: 7 Series GTZ Transceiver Power Module GTZ Transceiver Rail Nominal Voltage Maximum Current Rating Net Name MGTZVCC 1.075V MGTZVCCL 1.075V 1.3A MGTZVCCH 1.8V 0.300A www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 17 1-10) is provided for the FPGA. A 12V fan is affixed to the heats ink and is powered from the 3-pin friction lock header J121 (Figure 1-11). X-Ref Target - Figure 1-10 UG965_c1_10_070313 Figure 1-10: Active FPGA Heatsink VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 18 System ACE SD Configuration Address DIP Switches, page 20). Finally, a JTAG connector (J1) is available to provide access to the JTAG chain using one of Xilinx's configuration cables—Platform Cable USB, Platform Cable USB II or Parallel Cable IV (PCIV). www.xilinx.com...
  • Page 19 The DONE LED DS21 (callout 16, Figure 1-2) indicates the state of the DONE pin of the FPGA. When the DONE pin is High, DS21 lights indicating the FPGA is successfully configured. VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 20 Figure 1-13: Configuration Address DIP Switch (SW8) The switch settings for selecting each address are shown in Table 1-6. Table 1-6: SW8 DIP Switch Configuration Configuration Bitstream Address ADR2 ADR1 ADR0 www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 21 Table 1-9 shows the FPGA I/O mapping for the SuperClock-2 module interface. The VC7222 board also supplies UTIL_5V0, UTIL_3V3, UTIL_2V5 and VCCO_HP input power to the clock module interface. VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 22 AL12 Control I/O Output LVCMOS18 CM_CTRL_15 Input AN12 Control I/O In/Out LVCMOS18 CM_CTRL_16 AN11 Control I/O Output LVCMOS18 CM_CTRL_17 CS0_C3A Input Control I/O Output LVCMOS18 CM_CTRL_18 CS1_C4A Input www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 23 AN26 User LED Output LVCMOS18 APP_LED5 DS16 AP26 User LED Output LVCMOS18 APP_LED6 DS15 AM24 User LED Output LVCMOS18 APP_LED7 DS13 AN24 User LED Output LVCMOS18 APP_LED8 DS14 VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 24 Table 1-12: User Pushbuttons FPGA (U1) Schematic Reference Designator Net Name Function Direction IOSTANDARD AL22 User pushbutton Input LVCMOS18 USER_PB1 AM22 User pushbutton Input LVCMOS18 USER_PB2 www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 25 X-Ref Target - Figure 1-15 QUAD_115 QUAD_215 QUAD_114 QUAD_214 QUAD_113 QUAD_213 UG965_c1_15_070313 Figure 1-15: GTH Quad Locations VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 26 113_TX0_P 2,831 113_TX0_N 2,833 113_RX0_P 3,115 113_RX0_N 3,118 113_TX1_P 2,554 113_TX1_N 2,554 113_RX1_P 2,447 113_RX1_N 2,448 113_TX2_P 2,472 113_TX2_N 2,472 113_RX2_P 2,365 113_RX2_N 2,365 113_TX3_P 2,768 113_TX3_N 2,763 www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 27 115_TX0_P 2,728 115_TX0_N 2,726 115_RX0_P 2,957 115_RX0_N 2,958 115_TX1_P 2,448 115_TX1_N 2,448 115_RX1_P 2,406 115_RX1_N 2,407 115_TX2_P 2,530 115_TX2_N 2,530 115_RX2_P 2,489 115_RX2_N 2,489 115_TX3_P 2,826 115_TX3_N 2,825 VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 28 2,919 214_TX1_N J159 2,919 214_RX1_P J159 3,212 214_RX1_N J159 3,212 214_TX2_P J159 3,037 214_TX2_N J159 3,039 214_RX2_P J159 3,200 214_RX2_N J159 3,203 214_TX3_P J159 2,667 214_TX3_N J159 2,667 www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 29 Information for each GTH transceiver clock input is shown in Table 1-14. Table 1-14: GTH Transceiver Reference Clock Inputs FPGA (U1) Pin Net Name Quad Connector 113_REFCLK0_P 113_REFCLK0_N 113_REFCLK1_P 113_REFCLK1_N 114_REFCLK0_P 114_REFCLK0_N 114_REFCLK1_P 114_REFCLK1_N 115_REFCLK0_P 115_REFCLK0_N 115_REFCLK1_P VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 30 AC29 213_REFCLK0_P J158 AC30 213_REFCLK0_N J158 AA29 213_REFCLK1_P J158 AA30 213_REFCLK1_N J158 214_REFCLK0_P J159 214_REFCLK0_N J159 214_REFCLK1_P J159 214_REFCLK1_N J159 215_REFCLK0_P J241 215_REFCLK0_N J241 215_REFCLK1_P J241 215_REFCLK1_N J241 www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 31 X-Ref Target - Figure 1-17 CLKO CLK1 OCTAL_300B OCTAL_300A UG965_c1_17_010212 Figure 1-17: GTZ Quad Locations VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 32 2,953 300_RX0_N 300A 2,953 300_TX1_P 300A 2,332 300_TX1_N 300A 2,332 300_RX1_P 300A 2,252 300_RX1_N 300A 2,252 300_TX2_P 300A 2,338 300_TX2_N 300A 2,337 300_RX2_P 300A 2,250 300_RX2_N 300A 2,250 www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 33 Information for each GTZ transceiver clock input is shown in Table 1-16. Table 1-16: GTZ Transceiver Reference Clock Inputs FPGA (U1) Pin Net Name SMA Connector 300_REFCLK0_P 300_REFCLK0_N 300_REFCLK1_P 300_REFCLK1_N VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 34 Bidirectional differential serial data (P-side). GROUND Signal ground. The CP2103 supports an IO voltage range of 1.8V to 3.3V. Xilinx UART IP is expected to be implemented in the FPGA fabric. The FPGA supports the USB-to-UART bridge using four signal pins: •...
  • Page 35 Table 1-20: VITA 57.1 FMC1 HPC Connections at JA2 FPGA (U1) Pin Net Name FMC Pin FMC1_CLK0_M2C_P FMC1_CLK0_M2C_N AJ15 FMC1_CLK1_M2C_P AK15 FMC1_CLK1_M2C_N FMC1_CLK2_BIDIR_P FMC1_CLK2_BIDIR_N AL15 FMC1_CLK3_BIDIR_P AL14 FMC1_CLK3_BIDIR_N FMC1_LA00_CC_P FMC1_LA00_CC_N FMC1_LA01_CC_P VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 36 FMC1_LA05_P FMC1_LA05_N FMC1_LA06_P FMC1_LA06_N FMC1_LA07_P FMC1_LA07_N FMC1_LA08_P FMC1_LA08_N FMC1_LA09_P FMC1_LA09_N FMC1_LA10_P FMC1_LA10_N FMC1_LA11_P FMC1_LA11_N FMC1_LA12_P FMC1_LA12_N FMC1_LA13_P FMC1_LA13_N FMC1_LA14_P FMC1_LA14_N FMC1_LA15_P FMC1_LA15_N FMC1_LA16_P FMC1_LA16_N AM16 FMC1_LA17_CC_P AM15 FMC1_LA17_CC_N www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 37 AP16 FMC1_LA26_N AM17 FMC1_LA27_P AN17 FMC1_LA27_N AP15 FMC1_LA28_P AP14 FMC1_LA28_N AJ16 FMC1_LA29_P AK16 FMC1_LA29_N AD15 FMC1_LA30_P AE15 FMC1_LA30_N AK13 FMC1_LA31_P AL13 FMC1_LA31_N AF15 FMC1_LA32_P AG15 FMC1_LA32_N AH14 FMC1_LA33_P VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 38 AF29 FMC2_LA04_P AG29 FMC2_LA04_N AH28 FMC2_LA05_P AH29 FMC2_LA05_N AJ28 FMC2_LA06_P AK28 FMC2_LA06_N AL28 FMC2_LA07_P AL29 FMC2_LA07_N AF30 FMC2_LA08_P AG30 FMC2_LA08_N AG31 FMC2_LA09_P AG32 FMC2_LA09_N AH32 FMC2_LA10_P AH33 FMC2_LA10_N www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 39 AL18 FMC2_LA20_N AP20 FMC2_LA21_P AP21 FMC2_LA21_N AN19 FMC2_LA22_P AP19 FMC2_LA22_N AN18 FMC2_LA23_P AP18 FMC2_LA23_N AJ18 FMC2_LA24_P AJ19 FMC2_LA24_N AD20 FMC2_LA25_P AE20 FMC2_LA25_N AH21 FMC2_LA26_P AJ21 FMC2_LA26_N AF20 FMC2_LA27_P VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 40 AH18 FMC2_HA03_P AH19 FMC2_HA03_N AC19 FMC2_HA04_P AD19 FMC2_HA04_N AE18 FMC2_HA05_P AF18 FMC2_HA05_N AK26 FMC2_HA06_P AK27 FMC2_HA06_N AE23 FMC2_HA07_P AF23 FMC2_HA07_N AP24 FMC2_HA08_P AP25 FMC2_HA08_N AK23 FMC2_HA09_P AL23 FMC2_HA09_N www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 41 FMC2_HB17_CC_P AG26 FMC2_HB17_CC_N AN34 FMC2_PRSNT_M2C_L Notes: 1. This signal is connected to additional components and is not recommended for critical signals. See the VC7222 schematic for additional information. VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 42 1-22. Table 1-22: I2C Channel Assignments U39 Channel I2C Component SuperClock-2 module 7 series GTH transceiver power supply module FMC1 FMC2 7 series GTZ transceiver power supply module www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 43 1 through 6 must be set to the ON position as shown in Figure A-1. X-Ref Target - Figure A-1 SW10 VCCINT VCCAUX VCCBRAM VCCAUX_IO VCCO_HP VCCO_0 UG965_aA_01_121912 Figure A-1: Default Switch Settings VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...

  • Page 44: Appendix A: Default Jumper And Switch Settings

    Appendix A: Default Jumper and Switch Settings www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...

  • Page 45: Appendix B: Vita 57.1 Fmc Connector Pinouts

    LA32_P LA33_N HB20_P HB21_N 12P0V DP6_C2M_N HB17_N_CC LA32_N HB20_N 3P3V DP5_C2M_P VIO_B_M2C VADJ VADJ 3P3V DP5_C2M_N VIO_B_M2C VADJ VADJ 3P3V RES0 UG957_aB_01_070313 Figure B-1: FMC HPC Connector Pinout VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 46 Appendix B: VITA 57.1 FMC Connector Pinouts www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...

  • Page 47: Appendix C: Master Constraints File Listing

    Appendix C Master Constraints File Listing The VC7222 board master Xilinx design constraints (XDC) file template is provided for designs targeting the VC7222 Virtex®-7 FPGA GTH and GTZ Transceiver Characterization Board. Net names in the constraints listed below correlate with net names on the VC7222 board schematic.
  • Page 48 PACKAGE_PIN AM16 [get_ports FMC1_LA17_CC_P] set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA17_CC_P] set_property PACKAGE_PIN AM15 [get_ports FMC1_LA17_CC_N] set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA17_CC_N] set_property PACKAGE_PIN AM14 [get_ports FMC1_LA18_CC_P] set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA18_CC_P] www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 49 LVCMOS18 [get_ports FMC1_LA31_N] set_property PACKAGE_PIN AF15 [get_ports FMC1_LA32_P] set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA32_P] set_property PACKAGE_PIN AG15 [get_ports FMC1_LA32_N] set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA32_N] set_property PACKAGE_PIN AH14 [get_ports FMC1_LA33_P] VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 50 PACKAGE_PIN AG32 [get_ports FMC2_LA09_N] set_property IOSTANDARD LVCMOS18 [get_ports FMC2_LA09_N] set_property PACKAGE_PIN AH32 [get_ports FMC2_LA10_N] set_property IOSTANDARD LVCMOS18 [get_ports FMC2_LA10_N] set_property PACKAGE_PIN AH33 [get_ports FMC2_LA10_N] set_property IOSTANDARD LVCMOS18 [get_ports FMC2_LA10_N] www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 51 LVCMOS18 [get_ports FMC2_LA24_P] set_property PACKAGE_PIN AJ19 [get_ports FMC2_LA24_N] set_property IOSTANDARD LVCMOS18 [get_ports FMC2_LA24_N] set_property PACKAGE_PIN AD20 [get_ports FMC2_LA25_P] set_property IOSTANDARD LVCMOS18 [get_ports FMC2_LA25_P] set_property PACKAGE_PIN AE20 [get_ports FMC2_LA25_N] VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 52 LVCMOS18 [get_ports FMC2_HA04_N] set_property PACKAGE_PIN AE18 [get_ports FMC2_HA05_P] set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HA05_P] set_property PACKAGE_PIN AF18 [get_ports FMC2_HA05_N] set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HA05_N] set_property PACKAGE_PIN AK26 [get_ports FMC2_HA06_P] www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 53 LVCMOS18 [get_ports FMC2_HB07_P] set_property PACKAGE_PIN AP30 [get_ports FMC2_HB07_N] set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB07_N] set_property PACKAGE_PIN AM31 [get_ports FMC2_HB08_P] set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB08_P] set_property PACKAGE_PIN AN31 [get_ports FMC2_HB08_N] VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 54 LVCMOS18 [get_ports CM_CTRL_20] set_property PACKAGE_PIN AP13 [get_ports CM_CTRL_21] set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_21] set_property PACKAGE_PIN AM12 [get_ports CM_CTRL_22] set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_22] set_property PACKAGE_PIN AM11 [get_ports CM_CTRL_23] www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 55 [get_ports LVDS_OSC_N] #LEDs set_property PACKAGE_PIN AH26 [get_ports APP_LED1] set_property IOSTANDARD LVCMOS18 [get_ports APP_LED1] set_property PACKAGE_PIN AJ26 [get_ports APP_LED2] set_property IOSTANDARD LVCMOS18 [get_ports APP_LED2] set_property PACKAGE_PIN AM25 [get_ports APP_LED3] VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 56 LVCMOS18 [get_ports SA2_SDHOST_CMD] set_property PACKAGE_PIN AE12 [get_ports SA2_SDHOST_CLK] set_property IOSTANDARD LVCMOS18 [get_ports SA2_SDHOST_CLK] #SPI - MGT PWR MODULE set_property PACKAGE_PIN AC12 [get_ports MGT_MOD_SPI_SCK] set_property IOSTANDARD LVCMOS18 [get_ports MGT_MOD_SPI_SCK] www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 57 PACKAGE_PIN A2 [get_ports 115_TX3_P] set_property PACKAGE_PIN A1 [get_ports 115_TX3_N] set_property PACKAGE_PIN B4 [get_ports 115_RX3_P] set_property PACKAGE_PIN B3 [get_ports 115_RX3_N] set_property PACKAGE_PIN C2 [get_ports 115_TX2_P] set_property PACKAGE_PIN C1 [get_ports 115_TX2_N] VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 58 PACKAGE_PIN R30 [get_ports 215_REFCLK1_N] set_property PACKAGE_PIN A33 [get_ports 215_TX3_P] set_property PACKAGE_PIN A34 [get_ports 215_TX3_N] set_property PACKAGE_PIN B31 [get_ports 215_RX3_P] set_property PACKAGE_PIN B32 [get_ports 215_RX3_N] set_property PACKAGE_PIN C33 [get_ports 215_TX2_P] www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 59 PACKAGE_PIN A10 [get_ports 300_RX5_P] set_property PACKAGE_PIN A9 [get_ports 300_RX5_N] set_property PACKAGE_PIN C8 [get_ports 300_RX6_P] set_property PACKAGE_PIN C7 [get_ports 300_RX6_N] set_property PACKAGE_PIN A7 [get_ports 300_RX7_P] set_property PACKAGE_PIN A6 [get_ports 300_RX7_N] VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 60 Appendix C: Master Constraints File Listing www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...

  • Page 61: Appendix D: Additional Resources

    Virtex-7 FPGA VC7222 Characterization Kit documentation Virtex-7 FPGA VC7222 Characterization Kit Master Answer Record (AR 54015) These Xilinx documents and sites provide supplemental material useful with this guide: 7 Series FPGAs and Zynq-7000 All Programmable SoC XADC Dual 12-Bit 1 MSPS...
  • Page 62 16. 7 Series FPGAs Integrated Block for PCI Express v1.8 User Guide (PG054) 17. Information about GTZ Transceivers is available in the 7 Series FPGAs GTZ Transceivers Lounge. www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...

  • Page 63: Appendix E: Regulatory And Compliance Information

    Safety IEC 60950-1:2005, Information technology equipment – Safety, Part 1: General requirements EN 60950-1:2006, Information technology equipment – Safety, Part 1: General requirements VC7222 Transceiver Characterization Board www.xilinx.com Send Feedback UG965 (v1.4) February 11, 2015...

  • Page 64: Markings

    This product complies with Directive 2002/95/EC on the restriction of hazardous substances (RoHS) in electrical and electronic equipment. This product complies with CE Directives 2006/95/EC, Low Voltage Directive (LVD) and 2004/108/EC, Electromagnetic Compatibility (EMC) Directive. www.xilinx.com VC7222 Transceiver Characterization Board Send Feedback UG965 (v1.4) February 11, 2015...
  • Page 65 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Xilinx CK-V7-VC7222-G CK-V7-VC7222-G-J...

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