Xilinx Virtex-6 Manual page 298

Chapter 4: About Design Elements
RAM256X1S
Primitive: 256-Deep by 1-Wide Random Access Memory (Select RAM)
Introduction
This design element is a 256-bit deep by 1-bit wide random access memory with synchronous write and
asynchronous read capability. This RAM is implemented using the LUT resources of the device (also known
as Select RAM), and does not consume any of the block RAM resources of the device. If a synchronous read
capability is preferred, a register can be attached to the output and placed in the same slice as long as the
same clock is used for both the RAM and the register. The RAM256X1S has an active, High write enable, WE,
so that when that signal is High, and a rising edge occurs on the WCLK pin, a write is performed recording
the value of the D input data pin into the memory array. The output O displays the contents of the memory
location addressed by A, regardless of the WE value. When a write is performed, the output is updated to the
new value shortly after the write completes.
Port Descriptions
Port
O
D
A
WE
WCLK
Design Entry Method
Instantiation
Inference
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If instantiated, the following connections should be made to this component:
• Tie the WCLK input to the desired clock source, the D input to the data source to be stored, and the O output
to an FDCE D input or other appropriate data destination.
• The WE clock enable pin should be connected to the proper write enable source in the design.
• The 8-bit A bus should be connected to the source for the read/write.
• An optional INIT attribute consisting of a 256-bit Hexadecimal value can be specified to indicate the initial
contents of the RAM.
If left unspecified, the initial contents default to all zeros.
298
Direction
Output
Input
Input
Input
Input
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Width Function
1
Read/Write port data output addressed by A
1
Write data input addressed by A
8
Read/Write port address bus
1
Write Enable
1
Write clock (reads are asynchronous)
Yes
Recommended
No
No
Virtex-6 Libraries Guide for HDL Designs
UG623 (v 14.5) March 20, 2013