Xilinx Virtex-6 Manual page 238

Chapter 4: About Design Elements
Inputs
1 0 1
1 0 1
1 0 1
1 0 1
1 1 0
1 1 0
1 1 0
1 1 0
1 1 0
1 1 0
1 1 0
1 1 0
1 1 1
1 1 1
1 1 1
1 1 1
1 1 1
1 1 1
1 1 1
1 1 1
INIT = Binary equivalent of the hexadecimal number assigned to the INIT attribute
Port Descriptions
Port Direction
O6 Output
O5 Output
I0, I1, I2, I3, I4, I5 Input
Design Entry Method
Instantiation
Inference
CORE Generator™ and wizards
Macro support
Available Attributes
Attribute Data Type
INIT Hexadecimal
238
1 0
1 0
1 1
1 1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
Width
1
1
1
Yes
Recommended
No
No
Allowed Values Default
Any 64-Bit Value All zeros
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Outputs
0 INIT[12]
1 INIT[13]
0 INIT[14]
1 INIT[15]
0 INIT[16]
1 INIT[17]
0 INIT[18]
1 INIT[19]
0 INIT[20]
1 INIT[21]
0 INIT[22]
1 INIT[23]
0 INIT[24]
1 INIT[25]
0 INIT[26]
1 INIT[27]
0 INIT[28]
1 INIT[29]
0 INIT[30]
1 INIT[31]
Function
6/5-LUT output
5-LUT output
LUT inputs
Description
Specifies the LUT5/6 output function.
Virtex-6 Libraries Guide for HDL Designs
UG623 (v 14.5) March 20, 2013
INIT[44]
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INIT[55]
INIT[56]
INIT[57]
INIT[58]
INIT[59]
INIT[60]
INIT[61]
INIT[62]
INIT[63]