Xilinx Virtex-6 Manual page 177

Port
IDATAIN
INC
ODATAIN
RST
T
Design Entry Method
Instantiation
Inference
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Macro support
Available Attributes
Data
Attribute Type
CINVCTRL_SEL Boolean
DELAY_SRC String
HIGH_PERFOR Boolean
MANCE_MODE
Virtex-6 Libraries Guide for HDL Designs
UG623 (v 14.5) March 20, 2013
Direction Width Function
mode, the T port dynamically switches between the IDATAIN
and ODATAIN paths providing an alternating input/output delay
based on the direction indicated by the 3-state signal T from the
OLOGIC block.
Input 1 The IDATAIN input is driven by its associated IOB. In IDELAY
mode the data can be driven to either an ILOGIC/ISERDES block,
directly into the FPGA logic, or to both through the DATAOUT
port with a delay set by the IDELAY_VALUE.
Input 1 Increment/decrement number of tap delays.
Input 1
The ODATAIN input is driven by OLOGIC/OSERDES. In
ODELAY mode, the ODATAIN drives the DATAOUT port which
is connected to an IOB with a delay set by the ODELAY_VALUE.
Input 1
When in VARIABLE mode, the IODELAYE1 reset signal, RST,
resets the delay element to a value set by the IDELAY_VALUE or
ODELAY_VALUE attribute. If these attributes are not specified,
a value of zero is assumed. The RST signal is an active-High
reset and is synchronous to the input clock signal (C). When
in VAR_LOADABLE mode, the IODELAYE1 reset signal, RST,
resets the delay element to a value set by the CNTVALUEIN.
The value present at CNTVALUEIN[4:0] will be the new tap
value. As a results of this functionality the IDELAY_VALUE and
ODELAY_VALUE attribute is ignored.
Input 1 This is the 3-state input control port. For bidirectional operation,
the T pin signal also controls the T pin of the OBUFT. Tie high for
input-only or internal delay or tie low for output only.
Allowed Values
FALSE, TRUE
"CLKIN", "DATAIN",
"I", "IO", "O"
TRUE, FALSE
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Recommended
No
No
No
Default Description
FALSE Dynamically inverts the Clock (C) polarity.
"I" Specifies the source to the IODELAY
component.
• CLKIN - IODELAYE1 input is CLKIN.
• DATAIN - Not connected to any port
(internal mode).
• I - Connects directly to an input port or
IBUF (input mode).
• IO - Connects to a port.
• O - Connects to an output port or OBUF
(output mode).
TRUE When TRUE, this attribute reduces the
output jitter. When FALSE, reduces power
consumption. The difference in power
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