Motorola PowerQUICC II MPC8280 Series Reference Manual page 369

31
Field
Reset
R/W
Addr
15
Field
Reset
R/W
Addr
Figure 9-30. PCI Inbound Base Address Registers (PIBARx)
Table 9-17 describes PIBARx.
Bits Name
31–20 — Reserved, should be cleared.
19–0 BA Base address. PCI address which is the starting point for the inbound translation
window.This corresponds to bits 31–12 of a 32-bit address.
9.11.1.17 PCI Inbound Comparison Mask Registers (PICMRx)
The PCI inbound comparison mask registers (PICMRx), shown in Figure 9-31, defines the
inbound window's size. In PCI agent mode, this register should be initialized (either by the
core or by the CP's automatic EPROM load) before the AGENT_CFG_LOCK bit (see
Section 9.11.2.22, "PCI Bus Function Register") can be cleared to enable the host to
configure the device. Some of the fields of this registers are tied to the GPLABARx
registers; see Section 9.11.2.14, "General Purpose Local Access Base Address Registers
(GPLABARx)."
MOTOROLA
Freescale Semiconductor, Inc.
—
0000_0000_0000_0000
0x108F2 (PITAR0); 0x108DA (PITAR0)
0000_0000_0000_0000
0x108F0 (PITAR0); 0x108D8 (PITAR0)
Table 9-17. PIBARx Field Descriptions
Chapter 9. PCI Bridge
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20
R/W
BA
R/W
Description
Configuration Registers
19 16
BA
0
9-47