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Summary of Contents for Texas Instruments TMS320F28376D
- Page 1 TMS320F28379D, TMS320F28377D, TMS320F28376D, TMS320F28375D, TMS320F28374D Dual-Core Delfino Microcontrollers Silicon Errata Literature Number: SPRZ412G December 2013 – Revised July 2016...
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Page 2: Table Of Contents
PIE: Spurious Nested Interrupt After Back-to-Back PIEACK Write and Manual CPU Interrupt Mask ......................Clear ............Known Design Exceptions to Functional Specifications ...................... Documentation Support .......................... Revision History Table of Contents SPRZ412G – December 2013 – Revised July 2016 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... - Page 3 Table of Contents for Advisories ......................List of Advisories ..................Memories Impacted by Advisory ............Crystal Equivalent Series Resistance (ESR) Requirements SPRZ412G – December 2013 – Revised July 2016 List of Figures Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated...
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Page 4: Introduction
Predictions show that prototype devices (TMX or TMP) have a greater failure rate than the standard production devices. Texas Instruments recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used. -
Page 5: Device Markings
100-Pin PZP PowerPAD Thermally Enhanced Thin Quad Flatpack (HTQFP) TECHNOLOGY F = Flash DEVICE 28379D 28377D 28376D 28375D 28374D Figure 2. Example of Device Nomenclature SPRZ412G – December 2013 – Revised July 2016 TMS320F2837xD Dual-Core Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 6: Usage Notes And Known Design Exceptions To Functional Specifications
//Enable nesting in the PIE asm(" NOP"); //Wait for PIEACK to exit the pipeline EINT; //Enable nesting in the CPU TMS320F2837xD Dual-Core Delfino™ Microcontrollers SPRZ412G – December 2013 – Revised July 2016 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 7: Known Design Exceptions To Functional Specifications
..Advisory — Flash: Reset of CPU2 While it has Pump Ownership Can Cause Erroneous Flash Reads From CPU1 SPRZ412G – December 2013 – Revised July 2016 TMS320F2837xD Dual-Core Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 8: List Of Advisories
Due to Fast Transients at High Temperature Flash: Reset of CPU2 While it has Pump Ownership Can Cause Erroneous Flash Reads From CPU1 TMS320F2837xD Dual-Core Delfino™ Microcontrollers SPRZ412G – December 2013 – Revised July 2016 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 9: Advisory - Analog Trim Of Some Tmx Devices
1 (minimum) and 1023 (maximum) while observing the system clock on the XCLOCKOUT pin. SPRZ412G – December 2013 – Revised July 2016 TMS320F2837xD Dual-Core Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 10: Advisory - Adc: Adc Post-Processing Block Limit Compare
0x0000 753F, and 0x0000 75BF (writing this value is only valid when the ADCCLK prescale is a whole number). TMS320F2837xD Dual-Core Delfino™ Microcontrollers SPRZ412G – December 2013 – Revised July 2016 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 11: Single-Ended Input Model
For the revisions affected, when subsequent conversions switch between channel Workaround(s) groups, the S+H duration should be chosen to account for the additional capacitance. SPRZ412G – December 2013 – Revised July 2016 TMS320F2837xD Dual-Core Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 12: Advisory - Adc: Sensitivity To Esd Events
For high-impedance sources, it may be necessary to increase the duration of the acquisition window beyond what would be suggested by the characteristics of the ADC input model. TMS320F2837xD Dual-Core Delfino™ Microcontrollers SPRZ412G – December 2013 – Revised July 2016 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 13: Advisory - Adc: Adc Sparkle Codes
INL = ±4 LSB, DNL = [+1, -1] LSBs. Missing codes are present every 128 codes, in sets of up to 4 missing codes in a row. None Workaround(s) SPRZ412G – December 2013 – Revised July 2016 TMS320F2837xD Dual-Core Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 14: Advisory - Xrs May Toggle During Power Up
Set the error threshold bit-field (ERR_THRESHOLD.THRESHOLD) to a value greater Workaround(s) than or equal to 1. Note that the default value of the threshold bit-field is 0. TMS320F2837xD Dual-Core Delfino™ Microcontrollers SPRZ412G – December 2013 – Revised July 2016 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 15: Advisory - Epie: Spurious Vcu Interrupt (Epie 12.6) Can Occur When First Enabled
Other options for performing position counter reset, if appropriate for the application [such as Index Event Initialization (IEI)], do not have this issue. SPRZ412G – December 2013 – Revised July 2016 TMS320F2837xD Dual-Core Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 16: Advisory - Pll: May Not Lock On The First Lock Attempt
NOTE: The USB Boot Mode does not implement the previous workarounds. Applications using USB Boot will need to implement any retry attempts at the system level. TMS320F2837xD Dual-Core Delfino™ Microcontrollers SPRZ412G – December 2013 – Revised July 2016 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 17: Advisory - Sdfm: Data Filter Output Does Not Saturate At Maximum Value With Sinc3 And Osr = 256
(b) If the number of samples is less than or equal to N, clear the SDIFLG register; otherwise, do not clear the SDIFLG register to prevent further SDFM interrupts. SPRZ412G – December 2013 – Revised July 2016 TMS320F2837xD Dual-Core Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 18: Advisory - Sdfm: Comparator Filter Module May Generate Spurious Over-Value And Under-Value Conditions
3. Delay for at least a latency of data filter + 5 SD-Cx clock cycles. 4. Enable the SDFM data filter. TMS320F2837xD Dual-Core Delfino™ Microcontrollers SPRZ412G – December 2013 – Revised July 2016 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 19: Advisory - Fpu: Fpu-To-Cpu Register Move Operation Preceded By Any Fpu 2P Operation
|| MOV32 *--SP, R2H ; delay slot ; alignment cycle MOV32 @XAR3, R6H ; FPU register read of R6H SPRZ412G – December 2013 – Revised July 2016 TMS320F2837xD Dual-Core Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 20: Advisory - Fpu: Luf, Lvf Flags Are Invalid For The Einvf32 And Eisqrtf32 Instructions
LUF=0, LVF=0 ; Re-enable PIEIER12.7/8, i.e. re-enable the LUF/LVF interrupts @_PieCtrlRegs.PIEIER12.all, #0x00C0 MOV32 STF,*--SP ; Restore previous status flags TMS320F2837xD Dual-Core Delfino™ Microcontrollers SPRZ412G – December 2013 – Revised July 2016 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... - Page 21 // is the legitimate result of an overflow/underflow // from an FPU operation (not EISQRTF32/EINVF32) // Handle Overflow/Underflow condition // Ack the interrupt and exit SPRZ412G – December 2013 – Revised July 2016 TMS320F2837xD Dual-Core Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated...
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Page 22: Memories Impacted By Advisory
ADDRESSES IMPACTED F28375D F28374D 0x0000 07F8–0x0000 07FF GS11 0x0001 7FF8–0x0001 7FFF GS15 0x0001 BFF8–0x0001 BFFF Flash 0x000B FFF8–0x000B FFFF TMS320F2837xD Dual-Core Delfino™ Microcontrollers SPRZ412G – December 2013 – Revised July 2016 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 23: Advisory - Cmpss: Compxlatch May Not Clear Properly Under Certain Conditions
Revision(s) Affected The CMPIN4N, CMPIN4P, CMPIN5N, and CMPIN5P functions are not available on the Details silicon revisions affected. None Workaround(s) SPRZ412G – December 2013 – Revised July 2016 TMS320F2837xD Dual-Core Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 24: Advisory - Boot Rom: Device Will Hang During Boot If X1 Clock Source Is Not Present
– SYSBIOS_FLASH: origin = 0x080010, length = 0x0007BE • On future silicon revisions, use Sector B: – SYSBIOS_FLASH: origin = 0x082000, length = 0x000824 TMS320F2837xD Dual-Core Delfino™ Microcontrollers SPRZ412G – December 2013 – Revised July 2016 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 25: Crystal Equivalent Series Resistance (Esr) Requirements
(CL1/2 = 24 pF) Crystal shunt capacitance (C0) should be less than or equal to 7 pF. None Workaround(s) SPRZ412G – December 2013 – Revised July 2016 TMS320F2837xD Dual-Core Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 26: Ss Due To Fast Transients At High Temperature
Larger capacitors will be more effective at filtering the transient but must be balanced against the PCB level timing requirements of these pins. TMS320F2837xD Dual-Core Delfino™ Microcontrollers SPRZ412G – December 2013 – Revised July 2016 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 27: Advisory - Flash: Reset Of Cpu2 While It Has Pump Ownership Can Cause Erroneous Flash Reads From Cpu1
4. CPU2 takes ownership of the semaphore. 5. CPU1 will refrain from accessing the flash until CPU2 releases ownership of the flash pump semaphore. SPRZ412G – December 2013 – Revised July 2016 TMS320F2837xD Dual-Core Delfino™ Microcontrollers Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 28: Documentation Support
For more information regarding the TMS320F2837xD Delfino devices, see the following documents: • TMS320F2837xD Dual-Core Delfino™ Microcontrollers Data Manual • TMS320F2837xD Dual-Core Delfino Microcontrollers Technical Reference Manual TMS320F2837xD Dual-Core Delfino™ Microcontrollers SPRZ412G – December 2013 – Revised July 2016 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... -
Page 29: Revision History
SDFM: Dynamically Changing Data Filter Settings Will Trigger Spurious Data ......................Acknowledge Events advisory............• Section 4.2: Added Memory: Prefetching Beyond Valid Memory advisory. SPRZ412G – December 2013 – Revised July 2016 Revision History Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated... - Page 30 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.
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