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Chapter 9
Triple Timer Module
The timers in the DSP56374 internal triple timer module act as timed pulse generators or as pulse-width modulators. Each of the three timers
has a single signal (TIOx) that can function as a GPIO signal or as a timer signal. These three timers can also function as event counters to
capture an event or measure the width or period of a signal. Two of the timer pins also have a third functional option. TIO2 can be programmed
as a PLL PLOCK pin, and TIO1 can be programmed as a hardware watchdog timer (WDT).
9.1
Overview
The timer module contains a common 21-bit prescaler and three independent and identical general-purpose, 24-bit timer/event counters, each
with its own register set. Each of the timers has the following capabilities:
•
Uses internal or external clocking
•
Interrupts the DSP56374 after a specified number of events (clocks) or signals an external device after counting internal events
•
Triggers DMA transfers after a specified number of events (clocks) occurs
•
Connects to the external world through one bidirectional signal, designated
TIO[0, 1, 2] for timers 0, 1, 2.
When TIO is configured as an input, the timer functions as an external event counter or measures external pulse width/signal period. When
TIO is configured as an output, the timer functions as a timer, a watchdog timer, or a pulse-width modulator. When the timer does not use
TIO, it can be used as a GPIO signal (also called TIO[0, 1, 2]).
9.1.1
Triple Timer Module Block Diagram
Figure 9-1
shows a block diagram of the triple timer module. This module includes a 24-bit Timer Prescaler Load Register (TPLR), a 24-bit
Timer Prescaler Count Register (TPCR), and three timers. Each timer can use the prescaler clock as its clock source.
GDB
24
TPLR
Timer Prescaler
Load Register
24-bit Counter
CLK/2 TIO0 TIO1
9.1.2
Individual Timer Block Diagram
Figure 9-2
shows the structure of an individual timer block. The DSP56374 treats each timer as a memory-mapped peripheral with four
registers occupying four 24-bit words in the X data memory space. The three timers are identical in structure and function. Either standard
polled or interrupt programming techniques can be used to service the timers. A single, generic timer is discussed in this chapter. Each timer
includes the following:
Freescale Semiconductor
24
24
TPCR
Timer Prescaler
Count Register
TIO2
Figure 9-1. Triple Timer Module Block Diagram
DSP56374 Users Guide, Rev. 1.2
24
Timer 0
Timer 1
Timer 2
Overview
9-1
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