Interrupt Register; Interrupt Vector Register; Table 16-78 Interrupt Vector Register Description - Motorola DragonBall MC9328MX1 Reference Manual

Bluetooth Accelerator (BTA)

16.5.12 Interrupt Register

There is one interrupt control register.

16.5.12.1 Interrupt Vector Register

Reading the Interrupt Vector Register indicates the last BTA interrupt that occurred. The BTA generates
the following interrupts:
• Timer interrupt
• Interrupt when a frame is received or transmitted
• Interrupt when the header of a frame is received or transmitted
• SYSTICK interrupt
When 1 is written to any bit in the Interrupt Vector Register, the interrupt flag associated with that bit is
cleared. The Interrupt Vector Register bits are described in Table 16-78.
INTERRUPT_VECTOR
BIT 31 30 29
TYPE r r
0 0
RESET
BIT 15 14 13
TYPE r r
0 0
RESET
Name
Reserved Reserved—These bits are reserved and should read 0.
Bits 31–4
TIMER Timer Interrupt—Indicates whether a Bluetooth application timer
Bit 3 interrupt has occurred. Write
EOF End of Frame Interrupt—Indicates whether an end of frame
Bit 2 transmission and reception has occurred. Write
EOH End of Header Interrupt—Indicates whether an end of header reception
Bit 1 has occurred. See Section 16.5.1, "Sequencer Registers." Write
clear.
SYSTICK SYSTICK Interrupt—Indicates whether a SYSTICK of the current clock
Bit 0 has occurred. Write
16-86
Interrupt Vector Register
28 27 26 25
r r r r r
0 0 0 0 0
12 11 10 9
r r r r r
0 0 0 0 0
Table 16-78. Interrupt Vector Register Description
Description
1 to clear.
1 to clear.
MC9328MX1 Reference Manual
24 23 22 21 20
r r r r r
0 0 0 0 0
0x0000
8 7 6 5 4
r r r r r
0 0 0 0 0
0X0000
to clear.
1
1
Addr
0x00216160
19 18 17
r r r
0 0 0
3 2 1
TIMER EOF EOH SYSTICK
rw rw rw
0 0 0
Settings
0 = No timer interrupt
1 = Timer interrupt
0 = No EOF interrupt
1 = EOF interrupt
0 = No EOH interrupt
to 1 = EOH interrupt
0 = No SYSTICK
interrupt
1 = SYSTICK interrupt
MOTOROLA
16
r
0
0
rw
0