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Pulse-Width Modulator (PWM)
Adjust the 7-bit prescaler to achieve lower sampling rates by programming the PRESCALER field in the
PWMC register with any number between 0 and 127 to scale down the incoming clock source by a
corresponding factor of 1 to 128.
22.2.2 Pin Configuration for PWM
Figure 22-1 shows the signals used for the PWM module. The PWMO pin is multiplexed with other
functions on the device, and must be configured for PWM operation. Table 22-1 describes the procedure
for the PWM pin configuration.
The user must ensure that the data direction bit in the GPIO is set to the
correct direction for proper operation. See Section 32.5.1, "Data Direction
Registers," on page 32-9 for details.
Pin
PWMO
Primary function of
GPIO Port A [2]
22.3 PWM Operation
The pulse-width modulator has three modes of operation—playback, tone, and digital-to-analog (D/A)
converter.
22.3.1 Playback Mode
In playback mode, the pulse-width modulator uses the data from a sound file to output the resulting audio
through an external speaker. To reproduce the best quality of sound from a sound file, it is necessary to use
a sampling frequency that is equal to or an even multiple of the sampling frequency used to record the
sound.
The PWM produces variable-width pulses at a constant frequency. The width of the pulse is proportional
to the analog voltage of a particular audio sample. At the beginning of a sample period cycle, the PWMO
pin is set to 1 and the counter begins counting up from 0x0000. The sample value is compared on each
count of the prescaler clock. When the sample and count values match, the PWMO signal is cleared to 0.
The counter continues counting, and when it overflows from 0xFFFF to 0x0000, another sample period
cycle begins. The prescaler clock (PCLK) runs 256 times faster than the sampling rate when the PERIOD
field of the PWM period (PWMP) register is at its maximum value.
Figure 22-2 illustrates how variable width pulses affect an audio waveform.
Pulse-Width Modulation Stream
Filtered Audio
22-2
NOTE:
Table 22-1. Pin Configuration
Setting
1. Clear bit 2 of Port A GPIO In Use register (GIUS_A)
2. Clear bit 2 of Port A General Purpose register (GPR_A)
Figure 22-2. Audio Waveform Generation
MC9328MX1 Reference Manual
Configuration Procedure
MOTOROLA
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