Offset Clock High Register; Table 16-24 Offset Clock High Register Description - Motorola DragonBall MC9328MX1 Reference Manual

16.5.2.9 Offset Clock High Register

The Offset Clock High Register concatenated with the Offset Clock Low Register (see section 16.5.2.8)
comprise the difference between the native Bluetooth clock and the master Bluetooth clock. The Offset
Clock High Register contains the 12 most significant bits (MSBs) of the 28-bit OFFSETCLK. The Offset
Clock High Register bits are described in Table 16-24.
OFFSET_CLK_HIGH
BIT 31 30 29
TYPE r r r
0 0 0
RESET
BIT 15 14 13
TYPE r r r
0 0 0
RESET
Name
Reserved Reserved—These bits are reserved and should read 0.
Bits 31–12
OFFSET_CLK_HIGH High Bits of OFFSETCLK—Contains the MSBs (bits 27–16) of the 28-bit OFFSETCLK.
Bits 11–0
MOTOROLA
Offset Clock High Register
28 27 26 25
r r r r
0 0 0 0
12 11 10 9
r rw rw rw
0 0 0 0
Table 16-24. Offset Clock High Register Description
Bluetooth Accelerator (BTA)
24 23 22 21 20
r r r r r
0 0 0 0 0
0x0000
8 7 6 5 4
OFFSET_CLK_HIGH
rw rw rw rw rw
0 0 0 0 0
0x0000
Description
Programming Model
Addr
0x0021602C
19 18 17 16
r r r r
0 0 0 0
3 2 1 0
rw rw rw rw
0 0 0 0
16-39