Estimated Clock High Register; Table 16-22 Estimated Clock High Register Description - Motorola DragonBall MC9328MX1 Reference Manual

16.5.2.7 Estimated Clock High Register

The Estimated Clock High Register concatenated with the Estimated Clock Low Register (see section
16.5.2.6) comprise the estimated Bluetooth clock. The Estimated Clock High Register contains the 12 most
significant bits (MSBs) of the 28-bit ESTIMATEDCLK. The Estimated Clock High Register bits are
described in Table 16-22.
ESTIMATED_CLK_HIGH
BIT 31 30 29
TYPE r r r
0 0 0
RESET
BIT 15 14 13
TYPE r r r
0 0 0
RESET
Table 16-22. Estimated Clock High Register Description
Name
Reserved
Bits 31–12
ESTIMATED_CLK_HIGH
Bits 11–0
MOTOROLA
Estimated Clock High Register
28 27 26 25
r r r r
0 0 0 0
12 11 10 9
r rw rw rw
0 0 0 0
Reserved—These bits are reserved and should read 0.
High Bits of the ESTIMATEDCLK—Contains the MSBs (bits 27–16) of the 28-bit
ESTIMATEDCLK.
Bluetooth Accelerator (BTA)
24 23 22 21 20
r r r r r
0 0 0 0 0
0x0000
8 7 6 5 4
ESTIMATED_CLK_HIGH
rw rw rw rw rw
0 0 0 0 0
0x0000
Description
Programming Model
Addr
0x00216024
19 18 17 16
r r r r
0 0 0 0
3 2 1 0
rw rw rw rw
0 0 0 0
16-37