Block Read - Motorola DragonBall MC9328MX1 Reference Manual

block_write(rca, nob, addr_h, addr_l, buswidth)
{
send_cmd_wait_resp(SEND_STATUS, rca, 0x00, 0x01, 0x40);
while(!Ready for data in card status is true)
{
send_cmd_wait_resp(SEND_STATUS, rca, 0x00, 0x01, 0x40);
}
write_reg(NOB, <nob>);
send_cmd_wait_resp(SET_BLOCKLEN, 0x00, 0x0200, 0x01, 0x40);
if(buswidth==4-bit mode)
{
send_cmd_wait_resp(APP_CMD, rca, 0x0, 0x01, 0x40);
send_cmd_wait_resp(SET_BUS_WIDTH, 0x00, 0x02, 0x01, 0x40);
}
if(nob==1)
send_cmd_wait_resp(WRITE_SINGLE_BLOCK, addr_h, addr_l, 0x19, 0x40);
else
send_cmd_wait_resp(WRITE_MULTIPLE_BLOCK, addr_h, addr_l, 0x19, 0x40);
while(!FIFO empty in STATUS is true);
if(buswidth==4-bit mode)
{
for(i=0;i<(nob*8);i++)
{
while(!FIFO full in STATUS);// polling instead of irq or dma req
for(j=0;j<32;j++)
{
BUFFER_ACCESS = SDRAM_ADDR[i*32+j];
}
send_cmd_wait_resp(IO_RW_DIRECT, arg_h, arg_l, 0x5, 0x40);
}
}
else// 1-bit mode
{
for(i=0;i<(nob*32);i++)
{
while(!FIFO full in STATUS);// polling instead of irq or dma req
for(j=0;j<8;j++)
{
BUFFER_ACCESS = SDRAM_ADDR[i*8+j];
}
send_cmd_wait_resp(IO_RW_DIRECT, arg_h, arg_l, 0x5, 0x40);
}
}
while(!Access Operation Done in STATUS true);
while(!card bus is stop);
if(nob > 1)
{
send_cmd_wait_resp(STOP_TRANS, 0x00, 0x00, 0x41, 0x40);
}
}

20.7.3.1.2 Block Read

In Block Read Mode, data is transferred as a block whose size defined in the CSD (READ_BL_LEN).
When READ_BL_PARTIAL is set, smaller blocks whose starting and ending address are entirely
contained within one physical block can also be transmitted. In Block Mode transfer, CRC is used and
appended to the end of each block ensuring data transfer integrity.
initiates a block read and after completing the transfer, the card returns to the transfer state.
READ_MULTIPLE_BLOCK
continuously transferred until a stop command is issued. When the MMC/SD module uses partial blocks
with an accumulated length that is not block aligned and block misalignment is not allowed, the card
detects a block misalignment at the beginning of the first mis-aligned block, set the ADDRESS_ERROR
error bit in the Card Status Register, abort transmission, and wait in the data state for a stop command.
Code Example 20-9 provides the program code for the block read with DMA.
MOTOROLA Multimedia Card/Secure Digital Host Controller Module (MMC/SD)
Code Example 20-8. Block_Write with Polling
(CMD18) starts a transfer of several consecutive blocks. Blocks are
Functional Example for the MMC/SD Module
READ_SINGLE_BLOCK
(CMD17)
20-39