Motorola DragonBall MC9328MX1 Reference Manual page 52

Chapter 10
Chapter 11
Chapter 12
Chapter 13
Chapter 14
Chapter 15
Chapter 16
Chapter 17
Chapter 18
Chapter 19
Chapter 20
Chapter 21
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to allow a system to initialize a target system and download a program or data to
the target system's RAM using the UART controller.
Interrupt Controller (AITC): This chapter provides a description and
operational considerations for interrupt controller operation to perform interrupt
masking, priority support, and hardware acceleration of normal interrupts.
External Interface Module (EIM): This chapter describes the external interface
module and shows how the module handles the interface to devices external to
the MC9328MX1, including generation of chip selects for external peripherals
and memory.
Phase-Locked Loop and Clock Controller: This chapter provides detailed
information about the operation and programming of the clock generation
module as well as the recommended circuit schematics for external clock circuits.
It also describes and provides programming information about the operation of
the power control module and the system power states.
DMA Controller (DMAC): This chapter describes the operation of the direct
memory access controller contained in the MC9328MX1. The DMA controller
provides two memory channels and four I/O channels to support a wide variety
of DMA operations.
Watchdog Timer Module: The operation of the watchdog timer module is
described in this chapter. It includes information of how the watchdog timer
protects against system failures by providing a method of escaping from
unexpected events or programming errors.
Analog Signal Processor (ASP): This chapter describes the analog signal
processing module of the MC9328MX1 which provides support and conversion
capabilities for a variety of analog devices, including analog-to-digital controller
(ADC) for pen input. The ASP also includes embedded circuity to support a touch
panel.
Bluetooth Accelerator (BTA): This chapter describes the Bluetooth accelerator
which, controlled by software running on the ARM920T processor, implements
baseband protocols and other low-level link routines of the Bluetooth baseband.
Multimedia Accelerator (MMA): This chapter describes the operation of the
MMA which is used in conjunction with the ARM920T processor to perform the
iterative operations of a digital signal processor for applications such as MPEG
or MP3 encoding/decoding and speech compression/decompression.
Serial Peripheral Interface Modules (SPI 1 and SPI 2): The programming and
operation of the two identical serial peripheral interface modules (SPI 1 and
SPI 2) are described in this chapter.
LCD Controller (LCDC): This chapter describes the operation and
programming of the liquid crystal display controller, which provides display data
for external LCD drivers or for an LCD panel.
Multimedia Card/Secure Digital Host Controller (MMC/SD): This chapter
describes the Multimedia Card (MMC) host controller which controls
Flash-based mass storage products. This chapter also describes the Secure Digital
feature of the MMC, its operation and programming information.
Memory Stick Host Controller (MSHC): This chapter describes how data is
transferred to a Memory Stick device. It also discusses how to configure and
program the Memory Stick Host Controller.
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