Pin Configuration For Lcdc; Figure 19-9 Lcdc Interface Signals; Table 19-6 Pin Configuration - Motorola DragonBall MC9328MX1 Reference Manual

The format, timing, and polarity of the panel interface signals are programmable. There are two basic
modes, passive and active, selected by the TFT register bit. The user must also select either grayscale mode
or color mode.
SPL_SPR, PS, CLS and REV are other interface signals from the LCDC on the MC9328MX1. However,
these signals are dedicated for Sharp HR-TFT 320x240 panels only.

19.3.8.1 Pin Configuration for LCDC

Figure 19-9 shows the signals used for the LCDC. These pins are multiplexed with other functions on the
device, and must be configured for LCDC operation before they can be used.
The user must ensure that the data direction bits in the GPIO are set to the
correct direction for proper operation. See Section 32.5.1, "Data Direction
Registers," on page 32-9 for details.
Pin
LD [15:0] Primary function of
GPIO Port D [30:15]
FLM/VSYNC Primary function of
GPIO Port D [14]
LP/HSYNC Primary function of
GPIO Port D [13]
LSCLK Primary function of
GPIO Port D [6]
ACD/OE Primary function of
GPIO Port D [12]
CONTRAST Primary function of
GPIO Port D [11]
SPL_SPR Primary function of
GPIO Port D [10]
MOTOROLA
LCD Controller
Figure 19-9. LCDC Interface Signals
Table 19-6. Pin Configuration
Setting
1. Clear bits [30:15] of Port D GPIO In Use Register (GIUS_D)
2. Clear bits [30:15] of Port D General Purpose Register (GPR_D)
1. Clear bit 14 of Port D GPIO In Use Register (GIUS_D)
2. Clear bit 14 of Port D General Purpose Register (GPR_D)
1. Clear bit 13 of Port D GPIO In Use Register (GIUS_D)
2. Clear bit 13 of Port D General Purpose Register (GPR_D)
1. Clear bit 6 of Port D GPIO In Use Register (GIUS_D)
2. Clear bit 6 of Port D General Purpose Register (GPR_D)
1. Clear bit 12 of Port D GPIO In Use Register (GIUS_D)
2. Clear bit 12 of Port D General Purpose Register (GPR_D)
1. Clear bit 11 of Port D GPIO In Use Register (GIUS_D)
2. Clear bit 11 of Port D General Purpose Register (GPR_D)
1. Clear bit 10 of Port D GPIO In Use Register (GIUS_D)
2. Clear bit 10 of Port D General Purpose Register (GPR_D)
LCD Controller
LD [15:0]
FLM/VSYNC
LP/HSYNC
LSCLK
ACD/OE
PS
CLS
REV
SPL_SPR
CONTRAST
NOTE:
Configuration Procedure
LCDC Operation
19-11