Power Save Mode Operation; Figure 21-4 Power Save Mode; Table 21-3 Interrupt Detect Capability On Power Save Mode - Motorola DragonBall MC9328MX1 Reference Manual

Integrated portable system processor
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Memory Stick Host Controller (MSHC) Module

21.5.5 Power Save Mode Operation

Figure 21-4, "Power Save Mode," on page 21-8 depicts the Power Save Mode of the MSHC module.
The separate "Power Save Mode" feature of the MSHC module must not
be confused with the power save mode features of the MC9328MX1
system as described in Chapter 12, "Phase-Locked Loop and Clock
Controller."
Entering Power Save Mode
Cancelling Power Save Mode
After the MSHC module is placed in power save mode (PWS = 1), the Memory Stick cannot be placed in
SLEEP mode because the protocol cannot be started. The user must place the Memory Stick into SLEEP
mode before placing the MSHC module in Power Save Mode (PWS = 1). Also, first cancel Power Save
mode (PWS = 0) before waking up the Memory Stick.
In Power save mode, the MSHC module can detect and MS_PI [1:0] input status interrupt change.
Table 21-3 shows MC9328MX1 and MSHC module Power Save Mode combination and whether or not
MSHC module can detect them.
Table 21-3. Interrupt Detect Capability on Power Save Mode
MC9328MX1
Power Save Mode
Doze
Doze
Sleep
21-8
NOTE:
Memory Stick into SLEEP mode
Perform wake-up operations
Figure 21-4. Power Save Mode
MSHC Module
PWS
0 (No PWS)
1 (PWS)
X
MC9328MX1 Reference Manual
Execute SLEEP for the
SET_CMD to turn the
Set the PWS bit of the
MSCS register to 1
Set the PWS bit of the
0
MSCS register to
for the Memory Stick
MS_PI [1:0]
MS_SDIO
Interrupt
Interrupt
Detectable
Detectable
Detectable
Not detectable
Not detectable
Not detectable
MOTOROLA

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