Interrupt Configuration Registers; Interrupt Configuration Register 1; Table 32-15 Interrupt Configuration Register 1 Description - Motorola DragonBall MC9328MX1 Reference Manual

Integrated portable system processor
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32.5.7 Interrupt Configuration Registers

These registers specify the external interrupt configuration for each of the 32 interrupts. There are two bits
in the interrupt configuration registers for each port pin.
There are two interrupt configuration registers for each port; each holds the data for one of the four GPIO
ports (Port A, Port B, Port C, and Port D).

32.5.7.1 Interrupt Configuration Register 1

ICR1_A
ICR1_B
ICR1_C
ICR1_D
BIT
31
30
29
pin 15
TYPE
rw
rw
rw
0
0
0
RESET
BIT
15
14
13
pin 7
TYPE
rw
rw
rw
0
0
0
RESET
Table 32-15. Interrupt Configuration Register 1 Description
Name
ICR1 [i]
Interrupt Configuration—Corresponds to
Bits 31–0
interrupts 0–15 of the port and defines
which one of the four options is the
sensitivity of the interrupt. Each interrupt [i]
(i = 0 through 15) requires two ICR1 bits to
determine the sensitivity.
MOTOROLA
Port A Interrupt Configuration Register 1
Port B Interrupt Configuration Register 1
Port C Interrupt Configuration Register 1
Port D Interrupt Configuration Register 1
28
27
26
25
pin 14
pin 13
rw
rw
rw
rw
0
0
0
0
12
11
10
9
pin 6
pin 5
rw
rw
rw
rw
0
0
0
0
Description
GPIO Module and I/O Multiplexer (IOMUX)
24
23
22
21
ICR1
pin 12
pin 11
pin 10
rw
rw
rw
rw
0
0
0
0
0x0000
8
7
6
5
ICR1
pin 4
pin 3
rw
rw
rw
rw
0
0
0
0
0x0000
ICR1
ICR1
[2i + 1]
[2i]
0
0
0
1
1
0
1
1
Programming Model
0x0021C028
0x0021C128
0x0021C228
0x0021C328
20
19
18
17
pin 9
rw
rw
rw
rw
0
0
0
0
4
3
2
1
pin 2
pin 1
rw
rw
rw
rw
0
0
0
0
Settings
Sensitivity Selected
Positive edge sensitive
Negative edge sensitive
Positive level sensitive
Negative level sensitive
Addr
16
pin 8
rw
0
0
pin 0
rw
0
32-19

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