Mmc/Sd Clock Control Register - Motorola DragonBall MC9328MX1 Reference Manual

Multimedia Card/Secure Digital Host Controller Module (MMC/SD)
Table 20-4. Multimedia Controller Register Memory Map (Continued)
MMC/SD Block Length Register
MMC/SD Number of Blocks Register
MMC/SD Revision Number Register
MMC/SD Interrupt Mask Register
MMC/SD Command Number Register
MMC/SD Higher Argument Register
MMC/SD Lower Argument Register
MMC/SD Response FIFO Register
MMC/SD Buffer Access Register

20.6.1 MMC/SD Clock Control Register

The MMC/SD Clock Control Register allows the user to reset the system, enable the MMC/SD module,
and control the MMC/SD module clock.
To perform a system soft-reset and an MMC/SD module enable, the user
must program the MMC/SD Clock Control Register with a particular
sequence of values. The programmer must first write the value
then
0x000D
STR_STP_CLK
BIT 31 30 29
TYPE r r r
0 0 0
RESET
BIT 15 14 13
TYPE r r r
0 0 0
RESET
20-14
Description
NOTE:
, and then write
0x0005
MMC/SD Clock Control Register
28 27 26 25 24
r r r r r
0 0 0 0 0
12 11 10 9 8
r r r r r
0 0 0 0 0
MC9328MX1 Reference Manual
Name
BLK_LEN
NOB
REV_NO
INT_MASK
CMD
ARGH
ARGL
RES_FIFO
BUFFER_ACCESS
eight times.
23 22 21 20 19
r r r r r
0 0 0 0 0
0x0000
7 6 5 4 3
MMCSD
ENDIAN
_RESET
r r rw r w
0 0 0 0 0
0x0000
Address
0x00214018
0x0021401C
0x00214020
0x00214024
0x00214028
0x0021402C
0x00214030
0x00214034
0x00214038
,
0x0008
Addr
0x00214000
18 17 16
r r r
0 0 0
2 1 0
MMCSD_ START STOP
ENABLE _CLK _CLK
rw w w
0 0 0
MOTOROLA