Table 21-5 Mshc Module Dma Configuration Options; Programming Model; Table 21-6 Mshc Module Register Memory Map - Motorola DragonBall MC9328MX1 Reference Manual

Memory Stick Host Controller (MSHC) Module
Table 21-5. MSHC Module DMA Configuration Options
Parameter
FIFO SIZE
Memory size
DMA Burst length setting
DMA source select setting
DMA channels available for use
Memory address
Peripheral address
Byte count
Request Time-out
DMA interrupt

21.6 Programming Model

The MSHC module includes 11 user-accessible 16-bit registers. All registers are 16 bits wide and 16-bit
aligned. Because the MSHC module does not support byte access, the user must access on a word basis.
Table 21-6 summarizes the MSHC module registers and addresses.
Memory Stick Control/Status Register
Memory Stick Transmit FIFO Data Register
Memory Stick Receive FIFO Data Register
Memory Stick Interrupt Control/Status Register
Memory Stick Parallel Port Control/Data Register
Memory Stick Auto Command Register
Memory Stick FIFO Access Error Control/Status Register
21-12
MSHC Module RX
Table 21-6. MSHC Module Register Memory Map
Description
Memory Stick Command Register
Memory Stick Control 2 Register
MC9328MX1 Reference Manual
16-bit
8, 16-bit
2 bytes or
8 bytes
8
dma_req [8]
Channel 0–10
(FIFO to Memory)
User specified
0x0021A0004
(MSRDATA)
User specified
Supported
Supported
Name
MSCMD
MSCS
MSTDATA
MSRDATA
MSICS
MSPPCD
MSC2
MSACD
MSFAECS
MSHC Module TX
16-bit
8, 16-bit
2 bytes or
8 bytes
8
dma_req [8]
Channel 0–10
(Memory to FIFO)
User specified
0x0021A004
(MSTDATA)
User specified
Supported
Supported
Address
0x0021A000
0x0021A002
0x0021A004
0x0021A004
0x0021A006
0x0021A008
0x0021A00A
0x0021A00C
0x0021A00E
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