Endpoint N Fifo Read Pointer Registers; Endpoint N Fifo Write Pointer Registers; Table 28-23 Endpoint N Fifo Read Pointer Registers Description - Motorola DragonBall MC9328MX1 Reference Manual

Integrated portable system processor
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28.3.19 Endpoint n FIFO Read Pointer Registers

The Endpoint n FIFO Read Pointer Registers hold the location of the next FIFO location to read.
The number of Endpoint n FIFO Read Pointer Registers in the MC9328MX1 depends on the number of
endpoints configured.
USB_EP0_FRDP
USB_EP1_FRDP
USB_EP2_FRDP
USB_EP3_FRDP
USB_EP4_FRDP
USB_EP5_FRDP
BIT
31
30
29
TYPE
r
r
r
0
0
0
RESET
BIT
15
14
13
TYPE
r
r
r
0
0
0
RESET
Table 28-23. Endpoint n FIFO Read Pointer Registers Description
Name
Reserved
Reserved—These bits are reserved and should read 0.
Bits 31–6
RP
Read Pointer—Points to the next FIFO location to read. The physical address of this FIFO location
Bits 5–0
is actually the sum of the read pointer and the FIFO base, provided through a port to the FIFO
controller. This base address can vary, however if chosen properly, the FIFO RAM address can be
concatenated with the read pointer instead of requiring hardware for addition. The read pointer can
be both read and written. This ability facilitates the debugging of the FIFO controller and peripheral
drivers. The current maximum size of the write pointer is twelve bits, however it can be reduced
through parameterization.

28.3.20 Endpoint n FIFO Write Pointer Registers

The Endpoint n FIFO Write Pointer Registers hold the location of the next FIFO location to write.
The number of Endpoint n FIFO Write Pointer Registers in the MC9328MX1 depends on the number of
endpoints configured.
MOTOROLA
Endpoint 0 FIFO Read Pointer Register
Endpoint 1 FIFO Read Pointer Register
Endpoint 2 FIFO Read Pointer Register
Endpoint 3 FIFO Read Pointer Register
Endpoint 4 FIFO Read Pointer Register
Endpoint 5 FIFO Read Pointer Register
28
27
26
25
r
r
r
r
0
0
0
0
12
11
10
9
r
r
r
r
0
0
0
0
USB Device Port
24
23
22
21
20
r
r
r
r
r
0
0
0
0
0
0x0000
8
7
6
5
4
r
r
r
rw
rw
0
0
0
0
0
0x0000
Description
Programming Model
Addr
0x00212054
0x00212084
0x002120B4
0x002120E4
0x00212114
0x00212144
19
18
17
16
r
r
r
r
0
0
0
0
3
2
1
0
RP
rw
rw
rw
rw
0
0
0
0
28-33

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