Table of Contents
Advertisement
25.7.6 Configuring the SIM Cyclic Redundancy Check Block
Table 25-31 provides the steps to configure the SIM cyclic redundancy check (CRC) block for operation
and the cross references for identifying the specific section for additional reference.
Table 25-31. Configuring the SIM Cyclic Redundancy Check Block
Step
1.
Enable the CRC block:
a. Use the CRCEN bit in the CNTL register.
b. Use the XMT_EN_LRC_CRC bit to enable the transmission of the
CRC Character after the last character in the Transmit FIFO is sent.
See the T = 1 programming model for more details.
25.8 Using the SIM Receiver
After the SIM has been properly configured (correct baud rate, correct data format, and so on), SIM
receptions are enabled by setting the RCV_EN bit in the ENABLE register (see page 25-26). As bytes are
received, they are placed in the 32-byte deep receive data FIFO. Unread bytes are accessible from this
FIFO at any time. There is no need to disable the receiver to access the FIFO. The FIFO should be read
only when the receive FIFO data flag, RFD, in the RCV_STATUS register (see page 25-29) is set. The
RFD flag, which cannot create an interrupt, is high any time there is at least one unread byte in the receive
FIFO. When the receive FIFO is read when RFD is low, it simply produces the last byte read.
The receive data register full flag, RDRF, in the RCV_STATUS register (see page 25-29) determines when
the receive FIFO has reached a given threshold value. This flag creates an interrupt when the RIM bit in
the INT_MASK register (see page 25-31) is clear. To control at which point RDRF is set, program the
RDT bits in the RCV_THRESHOLD register (see page 25-26). When the number of unread bytes in the
receive FIFO is equal to or greater than the value set by RDT, RDRF is set.
A value of 0x0 in RDT implies that there must be 32 unread bytes in the
receive FIFO to trigger RDRF.
The value in RDT can be changed at any time to alter this threshold level. The comparison between the
number of unread bytes in the FIFO and the value set by RDT is continuously updated so that any change
in either is immediately reflected in the state of RDRF. For instance, when RDT is set to 5, and there are 3
unread bytes in the FIFO, changing RDT to 2 immediately sets RDRF. Likewise, setting RDT back to 5
clears RDRF. Similarly, when there are 5 unread bytes in the receive FIFO and RDT is set to 3, RDRF
remains high until 3 reads are complete, assuming RDT is left as a constant and no new data is received.
The standard flow for receiving bytes from the SmartCard is to set RDT to the appropriate value, wait for
RDRF to cause an interrupt (RIM clear), and then read bytes out of the receive FIFO as long as RFD is
high. In addition to checking RFD between every byte, it is also recommended that software check for the
existence of a set OEF flags as well.
MOTOROLA
Action
NOTE:
SmartCard Interface Module (SIM)
Using the SIM Receiver
Reference
Section 25.6.2, "Control Register,"
on page 25-23
Section 25.10.2.3 on page 25-54
25-45
Advertisement
Chapters
Table of Contents
