Motorola HC12 Manuals

Motorola HC12 Manuals

Manuals and User Guides for Motorola HC12. We have 1 Motorola HC12 manual available for free PDF download: Refrence Manual

Motorola HC12 Refrence Manual

Motorola HC12 Refrence Manual (440 pages)

Brand: Motorola | Category: Computer Hardware | Size: 3.57 MB

Table of Contents

Table of Contents
3
CPU12 Features
11
Introduction
11
Readership
11
Symbols and Notation
12
Section 2

15
Overview

15
- Programming Model
  15
- Data Types
  15
- Data Types
  19
- Memory Organization
  19
- Instruction Queue
  19
- Mode Summary
  21
- Effective Address
  22
- Inherent Addressing Mode
  22
- Immediate Addressing Mode
  22
- Direct Addressing Mode
  23
- Extended Addressing Mode
  23
- Relative Addressing Mode
  24
- Indexed Addressing Modes
  25
- Instructions Using Multiple Modes
  30
- Addressing more than 64 Kbytes
  32
Instruction Queue

33
- Queue Description
  33
- Data Movement in the Queue
  34
- Changes in Execution Flow
  34
Instruction Set Overview

39
Instruction Glossary

61
- Glossary Information
  61
- Condition Code Changes
  62
- Object Code Notation
  62
- Source Forms
  63
- Cycle-By-Cycle Execution
  65
- Glossary
  68
Exception Processing

277
- Types of Exceptions
  277
- Exception Priority
  278
- Resets
  278
- Interrupts
  278
- Unimplemented Opcode Trap
  278
- Software Interrupt Instruction
  282
- Exception Processing Flow
  282
- Exception Processing Flow Diagram
  283
Development and Debug Support

285
- External Reconstruction of the Queue
  285
- Instruction Queue Status Signals
  285
  - Queue Status Signal Timing
    286
- Implementing Queue Reconstruction
  288
- Background Debug Mode
  290
  - BDM Host to Target Serial Bit Timing
    292
  - BDM Target to Host Serial Bit Timing (Logic 0)
    293
- Instruction Tagging
  297
- Breakpoints
  298
Introduction

301
- Block Diagram of a Fuzzy Logic System
  303
- Fuzzification Using Membership Functions
  304
- Example Inference Kernel
  307
  - Fuzzy Inference Engine
    308
- MEM Instruction Details
  309
- REV, REVW Instruction Details
  313
  - REV Instruction Flow Diagram
    316
  - REVW Instruction Flow Diagram
    321
- WAV Instruction Details
  322
  - WAV and Wavr Instruction Flow Diagram
    325
- Custom Fuzzy Logic Programming
  326
  - Endpoint Table Handling
    328
- Expansion System Description
  331
- CALL and Return from Call Instructions
  333
- Address Lines for Expansion Memory
  334
- Using Chip-Select Circuits
  335
- System Notes
  337
  - A.1 Instruction Set Summary
    339
  - B.1 CPU12 Design Goals
    365
  - B.3 Programmer's Model and Stacking
    367
  - B.5 Improved Indexing
    370
  - B.6 Improved Performance
    373
  - B.7 Additional Functions
    375
  - C.1 Data Types
    381
  - C.3 Increment and Decrement Operators
    383
  - C.5 Conditional if Constructs
    384
  - C.9 Instruction Set Orthogonality
    385

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