Sim General Purpose Counter; Sim Lrc Block; Figure 25-14 Automatic Powerdown Sequence - Motorola DragonBall MC9328MX1 Reference Manual

Integrated portable system processor
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SmartCard Interface Module (SIM)
RST
CLK
DATA_XMT
SVEN

25.4.4 SIM General Purpose Counter

The SIM provides a 16-bit counter for timing events during SmartCard communication. The clock source
for the counter is selected from one of three sources: BAUD_CLK, RCV_CLK, or XMT_CK (ETU clock).
The general purpose counter clock select (GPCNT_CLK_SEL) bits in the CNTL register select the clock
input. The counter is enabled as soon as the input clock is selected and the counter starts as soon as the
input clock is running. Software controls the three input clock sources through the RCV_EN bit in the
ENABLE register, and the XMT_EN bits in the RESET_CNTL and ENABLE registers. The counter is
reset by setting GPCNT_CLK_SEL to 00. A 16-bit comparator value is provided that allows the software
to select a count value to set an interrupt flag and to generate an interrupt when the mask is clear.

25.4.5 SIM LRC Block

The SIM provides an 8-bit LRC generator/checker. The block is provided for use with T = 1 SmartCards
that support LRC. This block is enabled through the LRC enable (LRCEN) bit in the CNTL register. This
block performs an 8-bit exclusive-OR on all received or transmitted characters. At the end of the reception
of a block of characters, the expected result is 00. If so, the LRCOK bit is set in the RCV_STAT register.
During transmission, the LRC block performs exclusive-OR operations on each character transmitted with
the current value of the LRC. When the XMT_EN_LRC_CRC bit in the CNTL register is set, the LRC
value is automatically sent by the SIM transmitter as the final character when the transmit FIFO empties.
The LRC value can be reset in multiple ways. Clearing the LRCEN bit in the CNTL register resets the
LRC value. At the end of a transmission (either after the LRC byte is transmitted, or after the last character
in the transmit FIFO is sent when XMT_EN_LRC_CRC is clear), the LRC value is automatically reset by
the SIM hardware. Finally, when setting the XMT_EN bit in the ENABLE register, the SIM hardware
resets the LRC value.
25-16
30µs
Figure 25-14. Automatic Powerdown Sequence
MC9328MX1 Reference Manual
30µs
30µs
MOTOROLA

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