Table 15-10 Interrupt Control Register Description - Motorola DragonBall MC9328MX1 Reference Manual

Table 15-9. Compare Control Register Description (Continued)
Name
CC Compare Control—Controls the compare
Bit 18 operation.
INSEL Input Select—Selects the input samples to
Bits 17–16 compare with.
COMPARE VALUE Compare Value—Contains the value to compare with the selected sample.
Bits 15–0
15.5.4 Interrupt Control Register
The Interrupt Control Register enables and controls each interrupt function. All interrupts are grouped into
one of the two outputs to the system interrupt handler: TOUCH_INT and PEN_DATA_INT.
ASP_ICNTLR
BIT 31 30 29 28
TYPE r r r
0 0 0
RESET
BIT 15 14 13 12
TYPE r r r
0 0 0
RESET
Name
Reserved Reserved—These bits are reserved and should read 0.
Bits 31–11
PUIE Pen-up Enable—Enables/Disables Pen-up Interrupt signal.
Bit 10 The interrupt request number is 5.
Reserved Reserved—These bits are reserved and should read 0.
Bits 9 - 7
POL Pen Interrupt Polarity—Selects the polarity of the TOUCH_INT
Bit 6 input signal for interrupt trigger.
MOTOROLA
Description
Interrupt Control Register
27 26 25 24
r r r r r
0 0 0 0 0
11 10 9 8
PUI
E
r r r r r
0 0 0 0 0
Table 15-10. Interrupt Control Register Description
Description
Analog Signal Processor (ASP)
0 = Trigger when the compare value is
greater than the sample
1 = Trigger when the sample is
greater than the compare value
00 = No compare, interrupt disabled
01 = Channel X
10 = Channel Y
11 = Channel U
23 22 21 20
r r r r
0 0 0 0
0X0000
7 6 5 4
POL EDGE PIRQE
r rw rw rw
0 0 0 0
0X0000
Programming Model
Settings
Addr
0x00215018
19 18 17
r r r
0 0 0
3 2 1
PFFE PDRE
r r rw
0 0 0
Settings
0 = Disable
1 = Enable
0 = Active low, or falling edge
1 = Active high, or rising edge
15-13
16
r
0
0
rw
0