Initial Character Detection; Receive Fifo; Figure 25-11 Valid Initial Characters; Figure 25-12 Inverse Convention Vs. Direct Convention - Motorola DragonBall MC9328MX1 Reference Manual

Integrated portable system processor
Table of Contents

Advertisement

25.3.3.7 Initial Character Detection

The SIM receive state machine supports the detection of special characters that allow it to determine what
data format is being used by the connected SmartCard. When placed in initial character mode, the SIM
expects to receive one of two potential characters that it uses to set the IC bit in the CNTL register. Valid
initial characters are shown in Figure 25-11.
The two possible data formats are inverse convention and direct convention. Figure 25-12 illustrates the
differences between the two formats. Essentially, inverse convention differs from direct convention in that
the order of the data is flipped MSB for LSB, and the data bits and parity bit are logically inverted. When
receiving inverse convention data, the transformation of the data back to direct convention format is
performed by the hardware, including the inversion of the data and parity bits.
Start ba
Parity Bit:
When configured for even parity, the total number of logic 1s in the 9 bits (8 bits data, 1 parity bit) is even.
When configured for odd parity, the total number of logic 1s in the 9 bits (8 bits data, 1 parity bit) is odd.
When configured for inverse convention, the parity bit is inverted by SmartCard before being transmitted.
Direct Convention: The LSB of the data byte to be sent is ba, the MSB is bh. Neither of the data bits nor the parity bit a
logically inverted.
Inverse Convention: The MSB of the data byte to be sent is ba, the LSB is bh. Both of the data bits and the parity bit are
logically inverted by the SmartCard
Figure 25-12. Inverse Convention vs. Direct Convention

25.3.4 Receive FIFO

The 32 byte deep receive FIFO is implemented inside a sub-block of the receiver block of the
MC9328MX1. The receive FIFO is accessed through the RCV_BUF registers.
The receive FIFO is loaded from the receive shift register after the final bit of the current SmartCard
transmission has been received. The FIFO contains 10 bits per transmission. The lower eight bits contain
the received data byte. Bits 8 and 9 contain the parity and framing status for the received byte.
Each read from the receive FIFO increments the receive FIFO read pointer. Each time the receive shift
register is transferred to the receive FIFO, the receive FIFO write pointer is incremented. When the
difference between the read and write pointers equals the value in the receive data threshold (RDT) bits in
MOTOROLA
Start
Initial Character from SIM for setting direct convention (seen as $3B
when decoded by direct convention).
Start
Initial Character from SIM for setting inverse convention (seen as
$3F when decoded by inverse convention).
Figure 25-11. Valid Initial Characters
12 ETUs min
Byte
i
bb
bc
bd
be
bf
bg
SmartCard Interface Module (SIM)
P
Stop Bits
P
Stop Bits
Parity Bit
Byte
bh
P Stop Bits
Start
ba
Functional Description
i+1
bb
bc
bd
be
25-13

Advertisement

Table of Contents
loading

Table of Contents