Table 24-13 Address Multiplexing By Column Width; Table 24-14 Mc9328Mx1 To Sdram Interface Connections - Motorola DragonBall MC9328MX1 Reference Manual

SDRAM Memory Controller
Column Bits
Memory
Width
IAM=0 IAM=1
8 - 32
9 - 32
10 8 32
11 9 32
32
ALL
Table 24-14. MC9328MX1 to SDRAM Interface Connections
4M x16Bits
Memory
x 2 Chips
Configuration
(16 Mbyte)
MC9328MX1 Pins
Rows
Columns
Data size
Refresh rows 4096
IAM 0
MC9328MX1 Pins
A19
A18
A17
A16
24-30
Table 24-13. Address Multiplexing by Column Width
MA MA MA
11 10 9
A20 A19 A18
A21 A20 A19
A22 A21 A20
A23 A22 A21
AP AP A10
Indicates address lines not required for this memory width.
8Mx16Bits 16M x16Bits
x 2 Chips
(32 Mbyte)
SDRAM Memory Address Pins
12 12
8 9
32 32
4096
1 0 1
SDRAM Memory Address Pins
BA1
BA1 BA0
BA0
MC9328MX1 Reference Manual
SDRAM Controller Pin
MA MA MA MA
8 7 6 5
ROW
A17 A16 A15 A14
A18 A17 A16 A15
A19 A18 A17 A16
A20 A19 A18 A17
COLUMN
A9 A8 A7 A6
2M x32Bits
x 2 Chips x 1 Chip
(64 Mbyte) (8 Mbyte)
13 11
9 8
32 32
8192 2048
0 1 0 1
BA1
BA0 BA1
BA0
MA MA MA MA
4 3 2 1
A13 A12 A11 A10
A14 A13 A12 A11
A15 A14 A13 A12
A16 A15 A14 A13
A5 A4 A3 A2
4Mx32Bits 8M x32Bits
x 1 Chip x 1 Chip
(16 Mbyte) (32 Mbyte)
12 13
8 8
32 32
4096 8192
0 1 0
1
BA1
BA0
MOTOROLA
MA
0
A9
A10
A11
A12
A1
1
BA1
BA0