Usb Transfers; Data Transfers To The Host; Data Transfers To The Device - Motorola DragonBall MC9328MX1 Reference Manual

28.7.2 USB Transfers

Data transfers on the USB are composed of one or more packets. Instead of maintaining a transfer count,
the USB host and device send groups of packets to each other in units called transfers. In a transfer, all
packets are the same size, except the last one. The last packet in a transfer is a short packet, as small as 0
bytes (when the last data byte ends on a packet boundary).
This section describes how data transfers work from both the device to the host, and from the host to the
device.

28.7.2.1 Data Transfers to the Host

The user starts by determining the number of packets in the data block, based on the maximum packet size
of the target endpoint.
When the number of packets is an integer, the transfer ends on a packet boundary. A zero length packet is
required to terminate the transfer. When the number of packets is not an integer, the last packet of the
transfer is a short packet and no zero length packet is required.
For each packet in the transfer, write the data to the USB_EPn_FDAT register. The last byte in each packet
must be tagged with the end-of-frame marker through the USB_EPn_FCTRL register (WFR bit) or DMA
service request lines. Monitor the FIFO_LOW interrupt, EOF interrupt, or DMA service requests to
determine when the FIFO can accept another packet.
When a zero length packet is required to terminate the transfer after the last byte is written to the FIFO, set
the ZLPS bit in the USB_EPn_STAT register for the endpoint.
Wait for the EOT interrupt to determine when the transfer is complete.
For DMA operation, a zero length frame is not defined so it is necessary to
have the user software monitor the EOT interrupts and use them as a basis
for delineating individual transfers. USB traffic flow is halted until the
EOT interrupt is serviced to ensure that data from different data transfers
does not get mixed-up in the FIFOs.

28.7.2.2 Data Transfers to the Device

The length of data transfer from the host is generally not known in advance. The device receives a
continuous stream of packets and uses the EOT interrupt to determine when the transfer ended.
Software on the device monitors the EOF interrupt and/or the DMA transfer requests to manage packet
traffic. Each time a packet is received, the device must pull the data from the FIFO. When an end-of-frame
is transferred from the UDC module into the data FIFO, the EOF interrupt asserts. At the end of a complete
transfer, the EOT interrupt asserts. For a bulk endpoint, until the CPU has serviced the EOT interrupt, the
device Negative Acknowledges (NAKs) any further requests to that endpoint from the host. This
guarantees that data from two different transfers never get intermixed within the FIFO.
MOTOROLA
NOTE:
USB Device Port
Data Transfer Operations
28-41