Figure 30-6 Transmit Data Path (Txbit0 = 0, Tshfd = 0); Table 30-4 Data Bit Shifting Configuration - Motorola DragonBall MC9328MX1 Reference Manual

Integrated portable system processor
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Synchronous Serial Interface (SSI)
The Transmit Shift Direction (TSHFD) bit and Transmit Bit Position(TXBIT0) in the STCR determines
how the data is transmitted. Table 30-4 displays the data bit shifting configuration and Figure 30-6 through
Figure 30-9 visually the data path for each configuration.
TXBIT0
SSI_TXDAT
Figure 30-6. Transmit Data Path (TXBIT0 = 0, TSHFD = 0)
30-10
Table 30-4. Data Bit Shifting Configuration
TSHFD
WL[1:0]
0
0
xx
0
1
00
0
1
01
0
1
10
0
1
11
1
0
00
1
0
01
1
0
10
1
0
11
1
1
xx
8-Bit Word
10-Bit Word
15 14 13 12 11 10 9
15 14 13 12 11 10 9
Bit 15 is shifted out first.
The number of bits shifted is based on word length.
MC9328MX1 Reference Manual
Shifting from Bit
Bit 15 (MSB) first
Bit 8 (LSB) first, bit 15 (MSB) last
Bit 6 (LSB) first, bit 15 (MSB) last
Bit 4 (LSB) first, bit 15 (MSB) last
Bit 0 (LSB) first, bit 15 (MSB) last
Bit 7 (MSB) first, bit 0 (LSB) last
Bit 9 (MSB) first, bit 0 (LSB) last
Bit 11 (MSB) first, bit 0 (LSB) last
Bit 15 (MSB) first, bit 0 (LSB) last
Bit 0 (LSB) first
12-Bit Word
16-Bit Word
8
7
6
5
4
8
7
6
5
4
3
2
1
0
STX
3
2
1
0
TXSR
MOTOROLA

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